Implementing Virtual Address Hardware Support on the ?-VEX Platform

Implementing Virtual Address Hardware Support on the ?-VEX Platform

Johansen, J.

Wong, S. (mentor)

Electrical Engineering, Mathematics and Computer Science

Computer Engineering

2016-02-11

The ?-VEX is a run-time reconfigurable Very Long Instruction Word (VLIW) processor. This unique processor allows separation of its issue lanes to form independently operating processing cores. Switching between these configuration during run-time allows optimizing the platform for the task(s) it is performing. Porting an Operating System (OS) to this platform is an important step towards a software layer that can control these reconfigurations. All contemporary operating systems implement a virtual memory abstraction layer. This technique makes the physical memory layout transparent to the processes hosted by the operating system. Implementing virtual memory is impossible without hardware support. This thesis presents the design and implementation of the addition of this hardware to the ?-VEX platform. The platforms unusual architecture puts specific requirement on the memory system. The implemented hardware fully supports the platforms abilities for static configuration and dynamic reconfiguration. To verify that the implemented solution is able to support an OS, software is designed that emulates the task switching and memory virtualization tasks of an OS. By running this software it is proven that the hardware support all features required by a real OS. Finally, the performance of the implemented hardware is measured running benchmarks in different static configurations and several dynamic reconfiguration scenarios. These measurements are compared and recommendations are made for performance optimization of real applications.

reconfigurable
softcore
VLIW
Memory Management
Virtual Addressing
?-VEX
rVEX

http://resolver.tudelft.nl/uuid:ff57aedb-20f8-42cb-bc6f-513b8c8e94c5

Student theses

master thesis

(c) 2016 Johansen, J.