Searched for: subject%3A%22%255C%253F%255C-VEX%22
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document
van Bremen, Lennart (author)
The ρ-VEX is a runtime reconfigurable VLIW processor. It is able to exploit both ILP as well as TLP by running one program in multiple lanes, or several programs concurrently. To accurately quantify its performance compared to other processors, it is implemented as an IC.<br/>A fully automatic scripted flow is described, constructing an...
master thesis 2017
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Yanik, K.I.M. (author)
The trend of increasing performance by parallelism is followed by the adoption of heterogeneous systems. In order to allow more fine-tuned balancing between used thread- and instruction level parallelism, the heterogeneous ρ-VEX platform was developed. Pipelining has been a part of microprocessor development for decades to increase throughput of...
master thesis 2016
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Johansen, J. (author)
The ?-VEX is a run-time reconfigurable Very Long Instruction Word (VLIW) processor. This unique processor allows separation of its issue lanes to form independently operating processing cores. Switching between these configuration during run-time allows optimizing the platform for the task(s) it is performing. Porting an Operating System (OS) to...
master thesis 2016
document
Meun, K. (author)
Increased technology scaling not only resulted in a performance increase of the microprocessor, but also led to increasing device vulnerability to external disturbances. Scaling accelerates ageing induced failures of CMOS devices and the average lifetime of electronic devices diminishes. This thesis describes the design and implementation of a...
master thesis 2015
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Purba, M.S.B. (author), Yigit, E. (author), Regeer, A.J.J. (author)
Deze scriptie beschrijft het ontwerp van een embedded systeem dat de kenmerkende eigenschappen uit de afbeelding van een vingerafdruk haalt. Het betreft een hardware/software codesign, waarbij een VLIW-processor als accelerator is gebruikt.
bachelor thesis 2011
document
Van den Broeke, G. (author), Mul, D.P.N. (author)
Deze scriptie betreft een onderzoek naar het versnellen van een JPEG-decoder in een embedded systeem. Hierbij wordt de ?-VEX VLIW-processor als accelerator gebruikt. Onderzocht wordt hoe de hardware en software aan elkaar kunnen worden aangepast om de applicatie zo snel mogelijk uit te voeren.
bachelor thesis 2011
document
Seedorf, R.A.E. (author)
The speed gap between a processor realized in Semi-custom ASIC technology and a processor realized in FPGA technology is narrowing. In processor design, the approach is to define the microarchitecture of the processor and to design and implement it for executing an application domain. In this thesis, we have investigated the approach to design a...
master thesis 2010
Searched for: subject%3A%22%255C%253F%255C-VEX%22
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