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Vermaat, Bas (author)The ρ-VEX is a processor designed at the Computer Engineering lab at TU Delft to be reconfigurable at runtime, resulting in a processor that can combine or separate instruction lanes according to the program requirements. The current cache for the ρ-VEX processor is direct mapped and always identical to the instruction group configuration. This...master thesis 2021
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Johansen, J. (author)The ?-VEX is a run-time reconfigurable Very Long Instruction Word (VLIW) processor. This unique processor allows separation of its issue lanes to form independently operating processing cores. Switching between these configuration during run-time allows optimizing the platform for the task(s) it is performing. Porting an Operating System (OS) to...master thesis 2016