Searched for: subject%3A%22rVEX%22
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document
Dirks, Jacko (author)
This thesis documents the implementation of atomic instructions for the ρ-VEX (reconfigurable VEX). These instructions enable threads to communicate enabling efficient multithreading. Furthermore, we investigate the possibility to use inter-thread communication to improve performance of static ρ-VEX configurations without significantly...
master thesis 2018
document
Johansen, J. (author)
The ?-VEX is a run-time reconfigurable Very Long Instruction Word (VLIW) processor. This unique processor allows separation of its issue lanes to form independently operating processing cores. Switching between these configuration during run-time allows optimizing the platform for the task(s) it is performing. Porting an Operating System (OS) to...
master thesis 2016
document
Tetteroo, Jonathan (author)
As machine learning algorithms play an ever increasing role in today's technology, more demands are placed on computational hardware to run these algorithms efficiently. In recent years, Convolutional Neural Networks (CNNs) have become an important part of machine learning applications in areas such as object recognition and detection. In this...
master thesis 2018
document
Hilmarsson, Saevar (author)
Image processing is found in many fields and in many domains. Advances in<br/>digital image capturing technology allows for faster video rates, of higher quality, than has been seen before and that trend continues. With greater resolution and increased data flow there is also a need for faster and better hardware for image processing. As the...
master thesis 2018
document
Van der Wijst, H. (author)
In recent years the use of co-processors to accelerate specific tasks is becoming more common. To simplify the use of these accelerators in software, the OpenCL framework has been developed. This framework provides programs a cross-platform interface for using accelerators. The ?-VEX processor is a run-time reconfigurable VLIW processor. It...
master thesis 2015
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