Print Email Facebook Twitter FPGA accelerated Facial Recognition Title FPGA accelerated Facial Recognition Author Stekas, N. Contributor Wong, S. (mentor) Faculty Electrical Engineering, Mathematics and Computer Science Department Computer Engineering Date 2016-06-17 Abstract The ability to recognize faces is highly important in many areas of development. Though the years, the evolving technologies, enabled this process to be adapted in modern computer systems. These systems can be found in a wide variety of areas that yield significant impact. Therefore, there is an increasing demand for fast and accurate systems, able to perform facial recognition. In this thesis, a face recognition implementation on a FPGA-based System on Chip (SoC), is presented. This implementation utilizes Local Binary Patterns Histograms to extract features from test face images and Manhattan Distance to retrieve the correct match from the system’s face database. The SoC utilized is a Zynq-7030. The feature extraction and the distance computations, between the database, are implemented on the FPGA. The ARM processor of the SoC is responsible for receiving the input stream and presenting the output result, using the acquired distances. Real-time, high accuracy face recognition, with an execution time of 2.4 ms and accuracy of 78\%, is achieved through this implementation. Subject FPGASoCface regcognitionreal-time To reference this document use: http://resolver.tudelft.nl/uuid:359825f9-ed16-43f4-a998-d2028a6c3204 Part of collection Student theses Document type master thesis Rights (c) 2016 Stekas, N. Files PDF MSc Thesis Nikolaos Stekas.pdf 4.61 MB Close viewer /islandora/object/uuid:359825f9-ed16-43f4-a998-d2028a6c3204/datastream/OBJ/view