A Wideband Frequency-Agile Phase Modulator for Digital Polar Transmitters

A Wideband Frequency-Agile Phase Modulator for Digital Polar Transmitters

Polushkin, M.

De Vreede, L.C.N. (mentor)

Electrical Engineering, Mathematics and Computer Science

Electronics

2017-01-25

Over the past two decades, the use of wireless communication has increased dramatically, reaching a total global data usage of several exabytes per month, as of 2015. The transmitters (TX) used in wireless communication systems typically operate at efficiencies in the order of 20–30%, which puts a large strain both on the wireless network operators, due to the high energy costs, and the environment, due to carbon emissions. Since the power amplifier (PA) is by far the largest energy consumer in any transmitter system, the development of highly efficient PAs has become a popular research topic in recent years. One way in which the PA efficiency can be improved is by using the polar architecture, in which the signal to be amplified is split into envelope and phase components, which are presented separately at the input of the PA. This facilitates the use of non-linear but highly efficient amplifier classes, which improves the system efficiency. Further efficiency gains can be achieved by combining this approach with digital techniques as well as traditional efficiency enhancement techniques such as the Doherty topology. One of the major challenges associated with the polar architecture is the bandwidth expansion that occurs when converting from a Cartesian representation of the signal to envelope and phase. In particular, very few phase modulators have been reported in literature that support modulation bandwidths large enough for advanced communication standards such as WiFi, WiMAX and LTE. This thesis aims to tackle this problem by presenting a novel phase modulator concept which is both wideband enough to support 80MHz QAM signals, and frequency-agile so as to support the numerous communication standards in the low-GHz range. This concept has been implemented in TSMC’s 40nm CMOS technology, and although the performance of the phase modulator has not yet been experimentally verified, simulation results show that in a TX system with an ideal envelope path, the modulator can achieve 36 dB EVM and 47 dBc ACPR for an 80MHz 64-QAM signal at 2:4 GHz. At 900MHz, when the bandwidth is scaled proportionally to 30MHz, the phase modulator achieves 34 dB EVM and 47 dBc ACPR. The power consumption for these two cases is 33:3mW and 15:6mW, respectively, while the occupied chip area is 0:17mm2.

http://resolver.tudelft.nl/uuid:3ba60be7-1537-41d8-a7db-9e06feea2df3

2018-01-25

Student theses

master thesis

(c) 2017 M. Polushkin