Print Email Facebook Twitter A 200 μA Duty-Cycled PLL for Wireless Sensor Nodes in 65 nm CMOS Title A 200 μA Duty-Cycled PLL for Wireless Sensor Nodes in 65 nm CMOS Author Drago, Salvatore (NXP Semiconductors) Leenaerts, Domine M.W. (NXP Semiconductors) Nauta, Bram (University of Twente) Sebastiano, F. (TU Delft Electronic Instrumentation) Makinwa, K.A.A. (TU Delft Electronic Instrumentation) Breems, LJ (TU Delft Electronic Instrumentation) Date 2010 Abstract Subject CMOSduty-cyclefrequency stabilityfrequency synthesizerfully integratedPLLultra-low-powerwireless sensor networksWSN To reference this document use: http://resolver.tudelft.nl/uuid:4016a62d-9b7f-4d95-9a94-95fb03dee25c DOI https://doi.org/10.1109/JSSC.2010.2049458 ISSN 0018-9200 Source IEEE Journal of Solid State Circuits, 45 (7), 1305-1315 Bibliographical note Accepted Author Manuscript Part of collection Institutional Repository Document type journal article Rights © 2010 Salvatore Drago, Domine M.W. Leenaerts, Bram Nauta, F. Sebastiano, K.A.A. Makinwa, LJ Breems Files PDF 2897935_JSSC2049458.pdf 678.18 KB Close viewer /islandora/object/uuid:4016a62d-9b7f-4d95-9a94-95fb03dee25c/datastream/OBJ/view