A Highly-Linear Low-Power Down-Conversion Receiver for Digital Transmitter’s Error Detection

A Highly-Linear Low-Power Down-Conversion Receiver for Digital Transmitter’s Error Detection

Tariq Alaa Mohamed Aziz Ibrahim, Tariq (TU Delft Electrical Engineering, Mathematics and Computer Science)

de Vreede, L.C.N. (mentor)
Alavi, S.M. (graduation committee)
Bolatkale, M. (graduation committee)

Delft University of Technology

Electrical Engineering | Microelectronics

2022-08-31

Wireless data traffic is projected to steadily increase in the near future, necessitating the demand for transceivers with higher linearity and efficiency. Digital power amplifiers have the potential to achieve these higher efficiency demands while digital pre-distortion can be used to improve their linearity. Digital pre-distortion requires a highly-linear wideband observation receiver to down-convert and monitor the output of the transmitter. An observation receiver architecture that relies on baseband error-detection has been previously proposed by ELCA to reduce the stringent requirements on the analog-to-digital converter (ADC) in such an observation receiver. This thesis work presents a novel extremely-linear wideband voltage-domain harmonic-reject mixer targeting these observation receiver applications. The choice for a voltage-domain mixer instead of a current-domain mixer is first discussed. Three novel voltage-domain mixer topologies are then evaluated for their advantages and disadvantages, yielding the preferred topology for implementation. This circuit was designed in TSMC40nm thin-oxide CMOS technology yielding promising performance metrics when compared to similar state-of-the-art publications in the open literature; specifically in domain of observation receiver applications.

Mixer
Observation Receiver
Harmonic Rejection
Highly Linear
Wideband

http://resolver.tudelft.nl/uuid:596e068b-a94c-4335-8571-4168eff7ed70

2024-09-01

Student theses

master thesis

© 2022 Tariq Tariq Alaa Mohamed Aziz Ibrahim