Print Email Facebook Twitter High Resolution, Fully Digital Photon-Counting Image Sensors in DSM CMOS Technologies Title High Resolution, Fully Digital Photon-Counting Image Sensors in DSM CMOS Technologies Author Ulku, A.C. Contributor Charbon, E. (mentor) Faculty Electrical Engineering, Mathematics and Computer Science Department Quantum Engineering Date 2016-08-31 Abstract Single-Photon Avalanche Diodes (SPAD) have gradually become the top choice for time-resolved imaging applications thanks to their high timing resolution and single-photon sensitivity. However, a variety of factors complicate the implementation of SPAD sensors with large pixel arrays that achieve comparable specifications with competing technologies. The major issues that must be addressed to increase the scalability of SPAD sensors include fill factor, pixel array uniformity and power consumption. In addition, the integration of SPADs into deep sub-micron CMOS process technologies introduces its own challenges such as the lack of high voltage support and dead spaces that restrict pixel miniaturization. In this thesis, a time-gated, fully digital pixel with an in-pixel memory was presented. The pixel functionality and basic parameters were tested in a 110 nm 4×4 array. In addition, the scalability of this architecture was demonstrated by designing a 512×512 sensor in 0.18 ?um technology. Several performance boosting techniques were implemented in different variants of each chip. The impact of different SPAD structures on overall sensor performance was investigated. Finally, a 512×1 linear sensor with maximum 12 V excess bias was designed to operate the SPAD with high photon sensitivity. To reference this document use: http://resolver.tudelft.nl/uuid:6d21738b-35bc-452d-936a-af4fbc2d2ee1 Embargo date 2018-01-31 Part of collection Student theses Document type master thesis Rights (c) 2016 Ulku, A.C. Files PDF arin_can_ulku_msc_thesis.pdf 3.27 MB Close viewer /islandora/object/uuid:6d21738b-35bc-452d-936a-af4fbc2d2ee1/datastream/OBJ/view