Print Email Facebook Twitter High-Performance Back-Illuminated Three-Dimensional Stacked Single-Photon Avalanche Diode Implemented in 45-nm CMOS Technology Title High-Performance Back-Illuminated Three-Dimensional Stacked Single-Photon Avalanche Diode Implemented in 45-nm CMOS Technology Author Lee, M.J. (TU Delft (OLD)Applied Quantum Architectures; Swiss Federal Institute of Technology) Ronchini Ximenes, A. (TU Delft (OLD)Applied Quantum Architectures) Padmanabhan, P. (TU Delft (OLD)Applied Quantum Architectures; Swiss Federal Institute of Technology) Wang, Tzu Jui (Taiwan Semiconductor Manufacturing Company (TSMC)) Huang, Kuo Chin (Taiwan Semiconductor Manufacturing Company (TSMC)) Yamashita, Yuichiro (Taiwan Semiconductor Manufacturing Company (TSMC)) Yaung, Dun Nian (Taiwan Semiconductor Manufacturing Company (TSMC)) Charbon-Iwasaki-Charbon, E. (Swiss Federal Institute of Technology; Kavli institute of nanoscience Delft) Date 2018 Abstract We present a high-performance back-illuminated three-dimensional stacked single-photon avalanche diode (SPAD), which is implemented in 45-nm CMOS technology for the first time. The SPAD is based on a P+/Deep N-well junction with a circular shape, for which N-well is intentionally excluded to achieve a wide depletion region, thus enabling lower tunneling noise and better timing jitter as well as a higher photon detection efficiency and a wider spectrum. In order to prevent premature edge breakdown, a P-type guard ring is formed at the edge of the junction, and it is optimized to achieve a wider photon-sensitive area. In addition, metal-1 is used as a light reflector to improve the detection efficiency further in backside illumination. With the optimized 3-D stacked 45-nm CMOS technology for back-illuminated image sensors, the proposed SPAD achieves a dark count rate of 55.4 cps/μm2 and a photon detection probability of 31.8% at 600 nm and over 5% in the 420-920 nm wavelength range. The jitter is 107.7 ps full width at half-maximum with negligible exponential diffusion tail at 2.5 V excess bias voltage at room temperature. To the best of our knowledge, these are the best results ever reported for any back-illuminated 3-D stacked SPAD technologies. Subject Avalanche photodiode (APD)CMOS image sensordetectorGeiger-mode avalanche photodiode (G-APD)image sensorintegrated optics deviceintegrated photonicslight detection and ranging (LiDAR)low light leveloptical sensorphotodiodephotomultiplierphoton countingphoton timingsemiconductorsensorsiliconsingle-photon avalanche diode (SPAD)single-photon imagingstandard CMOS technologythree-dimensional fabricationthree-dimensional vision To reference this document use: http://resolver.tudelft.nl/uuid:d8cf233f-316a-4567-821f-aecf7dd1d244 DOI https://doi.org/10.1109/JSTQE.2018.2827669 ISSN 0792-1233 Source IEEE Journal of Selected Topics in Quantum Electronics, 24 (6), 1-9 Part of collection Institutional Repository Document type journal article Rights © 2018 M.J. Lee, A. Ronchini Ximenes, P. Padmanabhan, Tzu Jui Wang, Kuo Chin Huang, Yuichiro Yamashita, Dun Nian Yaung, E. Charbon-Iwasaki-Charbon Files PDF 47332098_08338386.pdf 2.12 MB Close viewer /islandora/object/uuid:d8cf233f-316a-4567-821f-aecf7dd1d244/datastream/OBJ/view