An Ultra-Low-Power ADPLL for BLE Applications

In recent years, wireless personal area network (WPAN) applications have triggered the needs for low-cost and low-power PLLs which also provide good performance. All-digital phased-locked loops (ADPLLs) are preferred over their analog counterparts in nanoscale CMOS technology due to their flexibility, configurability, small area and easy...

A 56.4-to-63.4 GHz Multi-Rate All-Digital Fractional-N PLL for FMCW Radar Applications in 65 nm CMOS

A mm-wave digital transmitter based on a 60 GHz all-digital phase-locked loop (ADPLL) with wideband frequency modulation (FM) for FMCW radar applications is proposed. The fractional-N ADPLL employs a high-resolution 60 GHz digitally controlled oscillator (DCO) and is capable of multi-rate two-point FM. It achieves a measured rms jitter of 590.2...