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Systeemontwerp voor beeldrealisatie op elektronisch papier
A hardware Accelerator for the OpenFOAM Sparse Matrix-Vector Product
Feasibilty Analysis for Hardware Acceleration of Pattern Recognition Algorithms
FPGA Hardware acceleration of co-occurring aberrations in aCGH data
Implementing Texture Feature Extraction Algorithms on FPGA
Protocol conversions for the Aethereal Networks-on-Chip
IWEX: Mapping on current high performance architectures
Hardware implementation of digital signal processing algorithms for long distance pipeline inspections
Reconfigurable Trigger Logic for Electronic Instrumentation in Space Applications
Design and Implementation of Real-Time High-Defnition Stereo Matching SoC on FPGA
Fingerprint Verification on the VEX Processor
Data Acquisition System Design for a 160x128 Single-photon Image Sensor with On-pixel 55 ps Time-to-digital Converter
An Off-Chip Bridge for On-Chip Network-Based Systems Supporting Traffic Quality of Service
Interrupt support on the ?-VEX processor
Implementation, Characterization, and Optimization of an FPGA-based Time-to-Digital Converter
Design and Prototype of the Range-Trie IP: Lookup in the HTX reconfigurable platform
High-Quality, Real-Time HD Video Stereo Matching on FPGA
Acceleration of Fingerprint Minutiae Extraction Using a VLIW Processor
System Level Support for Dynamic Partial Reconfiguration
Tile-Based rasterization on an embedded Tile-based MPSoC
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