"uuid","repository link","title","author","contributor","publication year","abstract","subject topic","language","publication type","publisher","isbn","issn","patent","patent status","bibliographic note","access restriction","embargo date","faculty","department","research group","programme","project","coordinates" "uuid:b6470807-609a-4c16-9ba9-2c05f80fd29d","http://resolver.tudelft.nl/uuid:b6470807-609a-4c16-9ba9-2c05f80fd29d","A Front-End ASIC with Receive Sub-array Beamforming Integrated with a 32 × 32 PZT Matrix Transducer for 3-D Transesophageal Echocardiography","Chen, C. (TU Delft Electronic Instrumentation); Chen, Z. (TU Delft Electronic Instrumentation); Bera, Deep (Erasmus MC); Raghunathan, S.B. (TU Delft ImPhys/Acoustical Wavefield Imaging); Shabanimotlagh, M. (TU Delft ImPhys/Acoustical Wavefield Imaging); Noothout, E.C. (TU Delft ImPhys/Acoustical Wavefield Imaging); Chang, Z.Y. (TU Delft Electronic Instrumentation); Ponte, Jacco (Oldelft Ultrasound); Prins, Christian (Oldelft Ultrasound); Vos, H.J. (TU Delft ImPhys/Acoustical Wavefield Imaging; Erasmus MC); Bosch, J.G. (Erasmus MC); Verweij, M.D. (TU Delft ImPhys/Acoustical Wavefield Imaging; Erasmus MC); de Jong, N. (TU Delft ImPhys/Acoustical Wavefield Imaging; Erasmus MC); Pertijs, M.A.P. (TU Delft Electronic Instrumentation)","","2017","This paper presents a power-and area-efficient front-end application-specific integrated circuit (ASIC) that is directly integrated with an array of 32 × 32 piezoelectric transducer elements to enable next-generation miniature ultrasound probes for real-time 3-D transesophageal echocardiography. The 6.1 × 6.1 mm2 ASIC, implemented in a low-voltage 0.18-μm CMOS process, effectively reduces the number of receive (RX) cables required in the probe's narrow shaft by ninefold with the aid of 96 delay-and-sum beamformers, each of which locally combines the signals received by a sub-array of 3 × 3 elements. These beamformers are based on pipeline-operated analog sample-and-hold stages and employ a mismatch-scrambling technique to prevent the ripple signal associated with the mismatch between these stages from limiting the dynamic range. In addition, an ultralow-power low-noise amplifier architecture is proposed to increase the power efficiency of the RX circuitry. The ASIC has a compact element matched layout and consumes only 0.27 mW/channel while receiving, which is lower than the state-of-the-art circuit. Its functionality has been successfully demonstrated in 3-D imaging experiments.","3-D ultrasound imaging; matrix transducer arrays; sub-array beamforming; transesophageal echocardiography (TEE); ultrasound application-specific integrated circuit (ASIC)","en","journal article","","","","","","","","","","","Electronic Instrumentation","","",""