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document
Staszewski, R.B. (author), De Vreede, L.C.N. (author)
patent 2011
document
Marchetti, M. (author), Pelk, M.J. (author), De Vreede, L.C.N. (author)
Measurement arrangement and method for active load pull measurements of a device under test (1). A wideband analog-to-digital conversion block (3) is provided for obtaining measurement data. First and second injection signal generators (7, 8) are connected to a source side and a load side of the device under test (1). This set up allows to...
patent 2009
document
De Vreede, L.C.N. (author)
Varactor element (Dl; D2) having a junction region, in which the depletion capacitance of the varactor element varies when a reverse bias voltage is applied to the varactor element. The varactor element (Dl; D2) has an exponential depletion capacitance- voltage relation, e.g. obtained by providing a predetermined doping profile in the junction...
patent 2007
document
Larson, L.E. (author), De Vreede, L.C.N. (author)
An integrated variable voltage diode capacitor topology applied to a circuit providing a variable voltage load for controlling variable capacitance. The topology includes a first pair of anti-series varactor diodes, wherein the diode power-law exponent n for the first pair of anti-series varactor diodes in the circuit is equal or greater than 0...
patent 2006
document
De Vreede, L. (author), Pelk, M.J. (author)
Loss-compensating circuit for use when analysing electrical properties, such as largesignal properties, of an electronic device to be tested (1) by means of an impedance tuner (6; 7). The loss-compensating circuit (15) comprises two symmetrically positioned negative impedance elements (26, 27) separated by a phase shift network (17; 28; 30). By...
patent 2004
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