Searched for: author%3A%22Astgimath%2C+S.P.%22
(1 - 1 of 1)
Astgimath, S.P. (author)
This thesis presents a high gain, low noise and low power dynamic residue amplifier and a low power, low noise dynamic comparator designed in TSMC 28nm process for a two step Pipelined SAR-ADC. The cascoded integrator dynamic residue amplifier (CIDRA) achieves a gain of 30dB with THD of 47dB (11 mV pp input). The input referred noise across tem-...
master thesis 2012