Technology platform for advanced neurostimulation implants: The “chip-in-tip” DBS probe

The progress in the field of neurostimulation is impressive, both from a technical as well as from a therapeutic point of view. Nowadays, the electrical stimulation of the nervous system can be used to induce or suppress muscle responses. Additionally, it can also influence hearing, vision, immune system response, pain perception, and even...

Cavity‐box soi: Advanced silicon substrate with pre‐patterned box for monolithic mems fabrication

Several Silicon on Insulator (SOI) wafer manufacturers are now offering products with customer‐defined cavities etched in the handle wafer, which significantly simplifies the fabrication of MEMS devices such as pressure sensors. This paper presents a novel cavity buried oxide (BOX) SOI substrate (cavity‐BOX) that contains a patterned BOX...

Effect of Signals on the Encapsulation Performance of Parylene Coated Platinum Tracks for Active Medical Implants

Platinum is widely used as the electrode material for implantable devices. Owing to its high biostability and corrosion resistivity, platinum could also be used as the main metallization for tracks in active implants. Towards this goal, in this work we investigate the stability of parylene-coated Pt tracks using passive and active tests. The...

Towards a semi-flexible parylene-based platform technology for active implantable medical devices

Active implantable medical devices have been developed for diagnosis, monitoring and treatment of large variety of neural disorders. Since the mechanical properties of these devices need to be matched to the tissue, soft materials, such as polymers are often preferred as a substrate [1]. Parylene is a good candidate, as it is highly...

Novel method of alignment to buried cavities in cavity-SOI wafers for advanced MEMS devices

Accurate alignment between the cavities in cavity-SOI (c-SOI) wafers and lithography on the wafer surface is essential to advanced MEMS production. Existing alignment methods are well defined, but often require specialized equipment or costly software packages available only in professional manufacturing environments. It would be beneficial...

Wafer-Scale Integration for Semi-Flexible Neural Implant Miniaturization

We present a novel, wafer-based fabrication process that enables integration and assembly of electronic components, such as ASICs and decoupling capacitors, with flexible interconnects. The electronic components are fabricated in, or placed on precisely defined and closely-spaced silicon islands that are connected by interconnects embedded in...

Single-Step CMOS Compatible Fabrication of High Aspect Ratio Microchannels Embedded in Silicon

This paper presents a new method for the CMOS compatible fabrication of microchannels integrated into a silicon substrate. In a single-step DRIE process (Deep Reactive Ion Etching) a network of microchannels with High Aspect Ratio (HAR) up to 10, can be etched in a silicon substrate through a mesh mask. In the same single etching step,...