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Zhang, Shizhao (author)
This thesis proposes a low-cost high-efficiency source-synchronous interface for high-speed inter-chip communication. The interface is composed of LVDS transceivers as external I/O buffers, and an all-digital data recovery, which can calibrate the received data phase to be aligned to the 90<sup>◦</sup> phase of the received half-rate reference...
master thesis 2017