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Nadeem, M. (author)
doctoral thesis 2014
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Nane, R. (author)
Reconfigurable Architectures (RA) have been gaining popularity rapidly in the last decade for two reasons. First, processor clock frequencies reached threshold values past which power dissipation becomes a very difficult problem to solve. As a consequence, alternatives were sought to keep improving the system performance. Second, because Field...
doctoral thesis 2014
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Seyab, M.S.K. (author)
Technology scaling along with the process developments has resulted in performance improvement of the transistor, which is one of the basic building blocks in almost all the electronic systems. However, the unabated scaling trend following Moore's law surface threats from process variation and reliability degradation. Nowadays, meeting the...
doctoral thesis 2013
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Wang, Y. (author)
Aggressive CMOS technology feature size scaling has been going on for the past decades, while the supply voltage is not proportionally scaled. Due to the increasing power density and electric field in the gate dielectric, the accelerating factors of failure mechanisms in nanoscale Integrated Circuits (ICs) have become more severe than ever. As a...
doctoral thesis 2013
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Nadeem, M.F. (author)
In this dissertation, we propose the design of a simulation framework to investigate the performance of reconfigurable processors in distributed systems. The framework incorporates the partial reconfigurable functionality of the reconfigurable nodes. Depending on the available reconfigurable area, each node is able to execute more than one task...
doctoral thesis 2013
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Anjam, F. (author)
In this dissertation, we propose to combine programmability with reconfigurability by implementing an adaptable programmable VLIW processor in a reconfigurable hardware. The approach allows applications to be developed at high-level (C language level), while at the same time, the processor organization can be adapted to the specific requirements...
doctoral thesis 2013
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Ostadzadeh, S.A. (author)
Recent trends show a steady increase in the utilization of heterogeneous multicore architectures in order to address the ever-growing need for computing performance. These emerging architectures pose specific challenges with regard to their programmability. In addition, they require efficient application mapping schemes to fully harness their...
doctoral thesis 2012
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Meeuws, R.J. (author)
Hardware estimation is an important factor in Hardware/Software Co-design. In this dissertation, we present the Quipu Modeling Approach, a high-level quantitative prediction model for HW/SW Partitioning using statistical methods. Our approach uses linear regression between software complexity metrics and hardware characteristics. The resulting...
doctoral thesis 2012
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Haron, N.Z.B. (author)
Emerging nanoelectronic memories such as Resistive Random Access Memories (RRAMs) are possible candidates to replace the conventional memory technologies such as SRAMs, DRAMs and flash memories in future computer systems. Despite their advantages such as enormous storage capacity, low-power per unit device and reduced manufacturing difficulties,...
doctoral thesis 2012
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Dragomir, O.S. (author)
The focus of this dissertation is on kernel loops (K-loops), which are loop nests that contain hardware mapped kernels in the loop body. In this thesis, we propose methods for improving the performance of such K-loops, by using standard loop transformations for exposing and exploiting the coarse grain loop level parallelism. We target a...
doctoral thesis 2011
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Pourebrahimi, B. (author)
In this dissertation, we present an economic framework to study and develop different market-based mechanisms for resource allocation in an ad-hoc Grid. Such an economic framework helps to understand the impact of certain choices and explores what are the suitable mechanisms from Grid user/owner perspectives under given circumstances. We focus...
doctoral thesis 2009
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