Searched for: contributor:"Goossens, K. (mentor)"
(1 - 9 of 9)
document
Huang, P. (author)
Voltage and Frequency Scaling (VFS) has been shown to reduce energy consumption effectively on system level. Most existing work in this field focused on deadline-constrained applications with finite schedule lengths. However, in typical real-time streaming applications, data processing is constantly activated by infinitely long data streams and...
master thesis 2011
document
Escudero Martínez, M. (author)
Prototyping Systems on Chip (SoC) on FPGA technology improves the time that the de- signer needs to spend in the verification stage when developing new systems or upgrading the existing ones. However, FPGA prototyping is very challenging due to the few resources available in this chips, and often the large designs do not fit into one single FPGA...
master thesis 2010
document
Karadeniz, T. (author)
High-performance routers have the task of transmitting traffic in between the nodes of the Internet, the network of networks that carries the vast amount of information among billions of users. The switch fabric is the key building block of every router, and various switch fabric architectures are used in the market products. The crossbar-based...
master thesis 2010
document
Chandrasekar, K. (author)
Network-on-Chip (NoC) is established as the most scalable and efficient solution for the on-chip communication challenges in the multi-core era, since it guarantees scalable high-speed communication with minimal wiring overhead and physical routing issues. However, efficiency of the NoC depends on its design decisions, which must be made...
master thesis 2009
document
Manivannan, M. (author)
Over the past few decades we have witnessed an exponential growth in the amount of data being used in virtually all domains. Extracting useful information from massive amounts of data is crucial and hence lot of data mining applications employing complex algorithms have been developed to aid in this task. As these data mining applications are...
master thesis 2009
document
De Windt, J. (author)
Bus based interconnects are commonly used to connect Intellectual Properties (IPs) on System-on-Chip (SoC). However, as the number of high performance IPs with large communication requirements in a Multi Processor SoC (MPSoC) increases, the bus interconnects become a communication bottleneck. To overcome this limitation, the bus based...
master thesis 2009
document
Woldegebreal, G. (author)
In this thesis, the design and implementation of an efficient front-end for composable resource sharing is presented. With composable re- source sharing, every application obtains a service that is not affected by interference from other applications that share the same resource. Since applications are shielded from interference, each one of...
master thesis 2009
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Briejer, M. (author)
We propose a power e?cient branch predictor for the Cell SPU, which normally depends on compiler inserted hint instructions to predict taken branches. We designed four predictors all using Branch History Table (BHT) to store the Branch Target Address and the prediction, which is computed using a bimodal counter. The Simple Bimodal Predictor (SBP...
master thesis 2009
document
Nazarian, G. (author)
Due to recent progress in semiconductor technology, communication is becoming the major source of expense in today's chip design. Network-on-Chip (NoC) is a new paradigm for solving the problem of complex communication on the chips. However, in order to NoC to be ecient in providing complex on-chip communication, the designers should be assured...
master thesis 2008
Searched for: contributor:"Goossens, K. (mentor)"
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