An Object Detecting Architecture using Spiking Neural Networks

Spiking Neural Networks have opened new doors in the world of Neural Networks. This study implements and shows a viable architecture to detect and classify blob-like input data. An architecture consisting of three parts a region proposal network, weight calculations, and the classifier is discussed and implemented. The region proposal network is...

Optimizing Multicore System Performance Using Dynamically Reconfigurable Architectures on FPGAs

Processor architecture is continuously evolving. As the trend predicted by Moore's law is nearing its end, the focus of designing processors has shifted from high-frequency single-core systems to the medium frequency multicore system to a relatively lower frequency many-cores system, in the hope of extracting more performance while keeping power...

Polyhedral Compilation for Data Flow Computers

The increasing transistor density of Integrated Circuits (ICs) ever since their introduction, has scaled the computational performance of microprocessors. As a consequence of the gain in transistor density, the power dissipation density has also increased to a degree that has become a limiting factor in further performance scaling. The prevalent...

Wired sensor network for measuring fat deposition in extraction channels: A Power Supply and Communication Module

The goal of this project is to identify the most promising measurement method and strategy for measuring the thickness of grease and to design a sensor module with electronic read-out and communication module. This project has been split into two parts: a sensor implementation and a communication system. This report describes the design and...

Hala ρ-VEX: Highly-Programmable Dynamically-Reconfigurable FPGA-based Streaming Platform for Image Processing

Image processing is found in many fields and in many domains. Advances in<br/>digital image capturing technology allows for faster video rates, of higher quality, than has been seen before and that trend continues. With greater resolution and increased data flow there is also a need for faster and better hardware for image processing. As the...

DRAM Reliability: Aging Analysis and Reliability Prediction Model

An increasing amount of critical applications use DRAM as main memory in its computing systems. It it therefore extremely important that these memories function correctly during their lifetime in order to prevent catastrophic failures. Already during the design phase, the reliability of the circuit needs to be predicted so that a reasonable...

Practical Microarchitectural Attacks from Integrated GPUs

Dark silicon is pushing processor vendors to add more specialized units such as accelerators to commodity processor chips. Unfortunately this is done without enough care to security. In this paper we look at the security implications of integrated Graphical Processor Units (GPUs) found in almost all mobile processors. We demonstrate that GPUs,...

Real-time Face and Landmark Localization for Eyeblink-Response Detection: A heterogenous CPU-GPU approach

Pavlovian eyeblink conditioning is a powerful experiment used in the field of neuroscience to measure multiple aspects of how we learn in our daily life. To track the movement of the eyelid during an experiment, researchers traditionally made use of potentiometers or electromyography (EMG). More recently, the use of computer vision and image...

Accelerated HaplotypeCaller DNA Analysis Application on FPGAs Using CAPI

DNA carries all the information needed to define the genetic structure of an individual. The large amounts of information stored in the DNA makes it costly to store and to process. In this work, a fast and efficient implementation of a Field Programmable GateArray (FPGA) based, streaming multicore architecture for accelerating variant calling...