Neuromorphic Retina Design to encode LIDAR based Scene Dynamics

Autonomous vehicle (AV technology) relies heavily on vision based applications like object recognition, obstacle/collision avoidance etc. In order to achieve this, understanding and estimating the dynamics in the environment is extremely important. LIDARs are proven to detect both shape as well as the speed/movement of the objects in the scene...

An Object Detecting Architecture using Spiking Neural Networks

Spiking Neural Networks have opened new doors in the world of Neural Networks. This study implements and shows a viable architecture to detect and classify blob-like input data. An architecture consisting of three parts a region proposal network, weight calculations, and the classifier is discussed and implemented. The region proposal network is...

SASCNN: A Systolic Array Simulator for CNN

Convolution Neural Networks (CNN) are used in many applications ranging from real-time object detection to robot-motion planning. CNNs are implemented on high-performance systems like multi-core CPU and GPU, these are of high power in nature and thus cannot be deployed in edge devices due to their limited battery power. The edge device has to...

N-shot Training Methodology: For Spiking Neural Networks(SNNs)

Traditional Artificial Neural Networks(ANNs)like CNNs have shown tremendous opportunities in various domains like autonomous cars, disease diagnosis, etc. Proven learning algorithms like backpropagation help ANNs in achieving higher accuracy. But there is a serious challenge with the increasing popularity of traditional ANNs is of energy...

Area Minimization of DTB Multiplexer: A Chip Component with High Wire Density and Congestion

DTB Multiplexer is a component within an NXP chip called the BAP3. This component provides a testing functionality for the chip. This component is purely combinational, and requires no clock, however this makes the component wiring-costly. This high wiring requirement leads to the area constraint imposed by the wiring demand rather than cell...

Energy-efficient multipath ring network for heterogeneous clustered neuronal arrays

Simulating large spiking neural networks (SNN) with a high level of<br/>realism in a field programmable gate array (FPGA) requires efficient<br/>network architectures that satisfy both resource and interconnect constraints, as well as changes in traffic patterns due to learning processes.<br/>Based on a clustered SNN simulator concept, in this...

Digital Neuron Cells for Highly Parallel Cognitive Systems

The high level of realism of spiking neuron networks and their complexity require a considerable computational resources limiting the size of the realized networks. Consequently, the main challenge in building complex and biologically accurate spiking neuron network is largely set by the high computational and data transfer demands. In this...

A 32 x 32 Spiking Neural Network System On Chip

In this thesis a prototyping system on chip of a 32 x 32 spiking neural network is presented. This network has been designed in UMC 65. In order to determine which neuron model to use three different analog CMOS neuron models are studied. One of these models is used in the network. The network consists of arrays of synapses and neurons, 32...