Design and Verification of LUPIn: A Platform for Hardware Attacks on Encrypted USB Drives

Forensics is the art of gathering evidence, which for electronics amounts to accurately recovering data. Often, this can only be archived with state-of-the-art hacking techniques.<br/>However, replicating state-of-the-art research in hardware security can be difficult, due to the large number of components and connections. To counter this, a...

Sharing external memory resources between strongly isolated domains in high-end security applications

Nowadays, the society strongly depends on computer networks and systems as a means of reliable communication and data storage. In order to maintain absolute security of the networks and thus the society, one would need to separate everything, but this is not feasible. Consequently, sharing of resources is inevitable. There are security products...

Streaming Integer Extensions for Snitch

The prosperity of the Internet-of-Things (IoT) imposes increasing demand on endpoint microcontroller-based devices' performance and energy efficiency. The MCUs are demanded to process the raw data acquired from the sensors with the integer-based workload, such as digital signal processing (DSP) algorithms and quantized neural network (QNN)...

A Toolchain for Streaming Dataflow Accelerator Designs for Big Data Analytics: Defining an IR for Composable Typed Streaming Dataflow Designs

Tydi is an open specification for streaming dataflow designs in digital circuits, allowing designers to express how composite and variable-length data structures are transferred over streams using clear, data-centric types. This provides a higher-level method for defining interfaces between components as opposed to existing bit- and byte-based...

Digital processing for large pixel array dToF systems

Over the last decade, the recognition of the potential value of augmented reality (AR) and other human-machine interfaces has been growing. These applications are all based on depth sensing technologies. Among various depth sensing technologies, the Time-of-Flight (ToF) approach is emerging as a widely applicable method because it has the...

Implementation and Evaluation of Packed-SIMD Instructions for a RISC-V Processor

With the increase in the amount of data being gathered, the need for data processing is also rising. Furthermore, in addition to the proprietary ISAs that have been prevalent, the free and open RISC-V ISA has seen major interest. The modularity of the RISC-V ISA allows it to be extended with many instruction set extensions. One such extension...

Hardware­-Based Methods for Memory Acquisition: Analysis and Improvements

Some server hosters facilitate cyber crime either intentionally (so called “bulletproof hosters”) or unintentionally (“bad hosters”). When dealing with uncooperative hosters during forensic investigations, it may sometimes be necessary to collect data or information on the servers without help from the owner of the server....

Exploring Feasibility of FPGAs in Implantable Medical Devices

Implantable Medical Devices (IMDs) are deployed in patients to treat a range of medical conditions. Technological advancements have enabled manufacturers to fit IMDs with specialized hardware that accelerates compute-intensive medical therapies next to a software-run host processor. However, mostly hardware acceleration is found in the form of...

RRAM-based fault-tolerant Binary Neural Networks

Computation-In-Memory (CIM) employing Resistive-RAM<br/>(RRAM)-based crossbar arrays is a promising solution to implement Neural Networks (NNs) on hardware, such that they are efficient with respect to consumption of energy, memory, computational resources, and computation time. In this respect, Binary NNs (BNNs), where the weights obtain single...

Complement-based Stochastic Computing Multiplier Design for Convolutional Neural Network Acceleration

Recently, it has become popular to use Convolutional Neural Networks (CNNs) in embedded and portable devices. The popularity is based on their high accuracy rate in the field of Computer Vision (CV). However, CNNs are computationally intensive due to the convolutional layer, which accounts for over 90% of the operations. To overcome this problem...

Dynamic cache configuration for the ρ-VEX platform

The ρ-VEX is a processor designed at the Computer Engineering lab at TU Delft to be reconfigurable at runtime, resulting in a processor that can combine or separate instruction lanes according to the program requirements. The current cache for the ρ-VEX processor is direct mapped and always identical to the instruction group configuration. This...

Design for a TCP/IP transparent FPGA-based network diode: To what extent is it possible to implement a network diode on an FPGA under realistic network environments, using the Transmission Control Protocol?

The urgency for high-security products for industrial networks is increasing as malicious hackers are improving their accessibility tools. A common practice for a company to protect its sensitive data is network segmentation. The network is segmented in different domains with distinctive security levels. The sensitive data is stored and managed...

Federated Learning for Mobile and Embedded Systems

An increase in the performance of mobile devices has started a revolution in deploying artificial intelligence (AI) algorithms on mobile and embedded systems. In addition, fueled by the need for privacy-aware insights into data, we see a strong push towards federated machine learning, where data is stored locally and not shared with a central...

ISA and Hardware Design for a Pipelined CIM-tile

Conventional Von Neumann machines inherently separate the processing units from the memory units. This architecture thus requires that data is transferred from the memory units to the processing units for performing computation, and results that should be stored are required to be transferred back to the memory units. Fast technological advances...

Arrow Prefetching: Prefetching Techniques for High Performance Big Data Processors using the Apache Arrow Data Format

As the digitisation of the world progresses at an accelerating pace, an overwhelming quantity of data from a variety of sources, of different types, organised in a multitude of forms or not at all, are subjected into diverse analytic processes for specific kinds of value to be extracted out of them. The aggregation of these analytic processes...

Automated Multi-core Scheduling for an Industrial-sized Mechatronic Motion Control Platform

Mechatronic embedded control systems are becoming increasingly sophisticated and computationally demanding. These systems typically consists of multiple controllers, which coordinate the actuators and apply feedback based on data collected by sensors. Often the underlying control strategy is entirely described in a software application, which...

Energy Efficient Feature Extraction for Single-Lead ECG Classification Based On Spiking Neural Networks

Cardiovascular diseases are the leading cause of death in the devel- oped world. Preventing these deaths, require long term monitoring and manual inspection of ECG signals, which is a very time consum- ing process. Consequently, a wearable system that can automatically categorize beats is essential.<br/>Neuromorphic machines have been introduced...