Interface Properties of Group-III-Element Deposited-Layers Integrated in High-Sensitivity Si Photodiodes

In this thesis, the research on silicon-based CMOS-compatible PureB technology was continued with the goal of enabling a PureB process module that could be added as a back-end module to wafers from a CMOS foundry. The properties of PureB layers deposited at low-temperature, particularly those deposited at 400°C were studied in more detail, among...