A Low Power 10-bit SAR ADC in a 45nm CMOS process

In this work a low power SAR ADC with 8.9 ENOB for wireless communication systems is presented. A capacitive charge redistribution DAC with a unit capacitor of 0.5fF is used. The implemented charge-sharing technique, allows the use of 2^(N-1) + 1 unit capacitors, instead of the conventional 2^N , thus decreasing the DAC area and the DAC...