A Low-Power Class-AB Residue Amplifier for a 12bit 500MS/sec Pipeline ADC with Digital Calibration

This work mainly focuses on designing a low-power class-AB residue amplifier for a 12bit 500MS/sec pipeline ADC with digital calibration. A foreground ideal calibration test bench has been implemented in MATLAB to correct non-linearities of the amplifier up to the 5th order. A detailed comparison has been made between a class-A amplifier and a...