A High-Resolution, Resistor-Based Temperature Sensor

This thesis focuses on developing a high-resolution, energy-efficient smart temperature sensor. A resistor-based temperature-sensing structure is chosen as the core of the sensor. To digitize the core output, a low-noise readout circuit is developed. The design was fabricated in a standard CMOS technology, and the measurements were conducted to...

Edge-prediction DTC and Clock-gating TDC Design for Ultra Low Power All Digital PLL

Full-Duplex CMOS Duplexer: Passive self-interference cancellation

To accommodate the growing demand for wireless communications, new techniques are required to increase throughput of wireless networks. One technology aiming to increase the spectral efficiency of wireless devices is full duplex (FD) radios. These systems are capable of single carrier transmission and reception and could ideally double the...

A CMOS Temperature Compensated Log-Amp Detector

Publications of bipolar log-amp detectors for RF power detection show good temperature and RF performance. So far published CMOS log-amps fail to demonstrate accurate performance over temperature. This thesis present a temperature compensated CMOS RF power detector based on the log-amp architecture with an industry temperature range of -40 C to...

DotFETs: MOSFETs strained by a Single SiGE dot in a Low-Temperature ELA Technology

The work presented in this thesis was performed in the context of the European Sixth Framework Program FP6 project “Disposable Dot Field Effect Transistor for High Speed Si Integrated Circuits”, referred to as the D-DotFET project. The project had the goal of realizing strain-enhanced mobility in CMOS transistors by transferring strain from a...

Mobility-based Time References for Wireless Sensor Networks

Wireless Sensor Networks require small low-cost radios to enable communication among its nodes. Since those radios must be fully integrated to reduce cost and size, integration is required also for their on-board time references, which are needed to achieve synchronization with the other nodes. To deal with the lower accuracy of integrated...

ADPLL Design for WiMAX

The frequency synthesizer, which functions as a local oscillator, is a critical block in the transceiver. It needs to meet very stringent specifications and consume as less power as possible. Design of a traditional charge-pump PLL as the frequency synthesizer in the advanced CMOS technologies in the transceiver of advanced communication systems...

Time-to-Digital Converter (TDC) for WiMAX ADPLL in State-of-The-Art 40-nm CMOS

WiMAX (Worldwide Interoperability for Microwave Access) is the emerging wireless technology standard of the near future, which enables high speed packet data access. To anticipate the future demands on WiMAX technology, we proposed an ADPLL (all-digital phase locked loop) solution for the WiMAX system. The developed ADPLL system has targeted...