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Marinissen, E.J. (author), Chi, C.C. (author), Konijnenburg, M. (author), Verbree, J. (author)Process technology developments enable the creation of three-dimensional stacked ICs (3D-SICs) interconnected by means of Through-Silicon Vias (TSVs). This paper presents a 3D Design-for-Test (DfT) architecture for such 3D-SICs that allows prebond die testing as well as mid-bond and post-bond stack testing. The architecture enables a modular...journal article 2011