Rapid Design-Space Exploration for Low-Power Manycores under Process Variation utilizing Machine Learning

Energy Optimization for Large-Scale 3D Manycores in the Dark-Silicon Era

On Leveraging Vertical Proximity in 3D Memory Hierarchies

Hybrid NEMS-CMOS Architectures for Ultra Low Power Smart Systems: Architectures for Ultra Low Power Smart Systems

Yield and Cost Analysis or 3D Stacked ICs

Yield Improvement for 3D Wafer-to-Wafer Stacked Memories

A DfT architecture for 3D-SICs based on a standardizable die wrapper