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Kiene, G. (author), Overwater, R.W.J. (author), Catania, Alessandro (author), Gunaputi Sreenivasulu, A.M. (author), Bruschi, Paolo (author), Charbon-Iwasaki-Charbon, E. (author), Babaie, M. (author), Sebastiano, F. (author)This article presents a two-times interleaved, loop-unrolled SAR analog-to-digital converter (ADC) operational from 300 down to 4.2 K. The 6-8-bit resolution and the sampling speed up to 1 GS/s are targeted at digitizing the multi-channel frequency-multiplexed input in a spin-qubit reflectometry readout for quantum computing. To optimize the...journal article 2023
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Xie, S. (author), Theuwissen, A.J.P.A.M. (author)This brief proposes a successive approximation register (SAR) analog-to-digital converter (ADC) whose readout speed is improved by 33%, through applying a digital error correction (DEC) method, compared to an alternative without using the DEC technique. The proposed addition-only DEC alleviates the ADC's incomplete settling errors, hence...journal article 2020
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Ursulean, M. (author)The thesis analyzes the design challenges that arise when developing high-speed ADCs and shows, through an extensive architecture study, that the SAR topology can be used with a sampling rate of 2.5GS/s if asynchronous processing and a multi-bit per cycle approach are adopted. The transistor-level implementation and simulation of a 6-bit SAR ADC...master thesis 2016