Searched for: subject%3A%22Auto%255C+Zero%22
(1 - 7 of 7)
document
Eland, E.N. (author), Mehrotra, Shubham (author), Karmakar, S. (author), van Veldhoven, Robert (author), Makinwa, K.A.A. (author)
Zoom ADCs combine a coarse SAR ADC with a fine delta-sigma modulator (?SM) to efficiently obtain high energy efficiency and high dynamic range. This makes them well suited for use in various instrumentation and audio applications. However, zoom ADCs also have drawbacks. The use of over-ranging in their fine modulators may limit SNDR, large...
book chapter 2023
document
Rooijers, C.T. (author), Huijsing, J.H. (author), Makinwa, K.A.A. (author)
This article describes an auto-zero stabilized voltage buffer that achieves low offset and low noise with sub-pA input current. A high gain stabilization loop is used to periodically cancel the buffer’s offset. The loop itself is periodically disconnected from the buffer and auto-zeroed, during which its bandwidth is reduced to reduce the...
journal article 2022
document
Rooijers, C.T. (author), Karmakar, S. (author), Kusuda, Y. (author), Huijsing, J.H. (author), Makinwa, K.A.A. (author)
In chopper amplifiers, the interaction between the input signal and the chopper clock can give rise to intermodulation distortion (IMD). This chopper-induced IMD is mainly due to amplifier delay, which causes large pulses at the output of the amplifier's output chopper. This article proposes the use of a so-called fill-in technique to eliminate...
journal article 2021
document
Rooijers, C.T. (author)
A sampled voltage reference aims to achieve both low-power and low-noise by storing the output of a voltage reference on a capacitor for a long time. This allows the reference to be switched off during the hold period, which leads to lower average power. At the same time, all the voltage reference's noise is pushed down into a bandwidth...
master thesis 2016
document
Saha, A. (author)
The motivation behind this thesis is that cardio-vascular diseases claim the highest number of lives each year globally. In order to enhance the accuracy in diagnosis, construction of 3D images of the heart is required. From these images, precise information can be obtained regarding the 3D anatomy of the heart and its functioning. Trans...
master thesis 2013
document
Guo, J. (author)
This thesis presents a Delay Locked Loop(DLL) based Single Slope ADC. Compared to the convertional Single Slope ADC, the readout speed is increased by 16 times. A DLL is designed with a start-controlled Phase Frequency Detector (PFD), a differential ended Charge Pump (CP) and fully differential Delay Cells (DC). The multi-stage comparator with...
master thesis 2011
document
Witte, J.F. (author), Huijsing, J.H. (author), Makinwa, K.A.A. (author)
journal article 2008
Searched for: subject%3A%22Auto%255C+Zero%22
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