Searched for: subject:"Duty%5C-cycling"
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Rooijers, C.T. (author)
A sampled voltage reference aims to achieve both low-power and low-noise by storing the output of a voltage reference on a capacitor for a long time. This allows the reference to be switched off during the hold period, which leads to lower average power. At the same time, all the voltage reference's noise is pushed down into a bandwidth...
master thesis 2016
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Gao, Y. (author)
This thesis deals with the design of a duty-cycled, fractional-N and low-noise Phase Locked Loop (PLL) used for Ultra-Wideband applications in 40 nm process. This is the first-ever Duty-Cycled PLL (DCPLL) that is designed with an LC oscillator and brings down the noise record for DCPLLs by more than 1 order of magnitude. Due to the special...
master thesis 2014
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Li, S. (author)
When a sensor network is deployed, we fundamentally care about three main outcomes: to obtain as much data as possible (high delivery rate), to obtain data as fast as possible (low latency), and to obtain data for as long as possible (long lifetime). This last metric, called network lifetime, is of great importance and has been widely...
master thesis 2014