Searched for: subject%3A%22Fractional%255C-N%255C%2BADPLL%22
(1 - 1 of 1)
Chen, P. (author)
The technology scaling favors the Digital PLLs, which is reconfigurable. In the traditional fractional-N ADPLL, whether counter-based or divider based, DCO and TDC are the main two power consuming blocks. Modifying the phase detection part based on phase prediction makes the architecture more energy-efficient. The new architecture leads to the...
master thesis 2014