Timing and Resource-aware Mapping of Quantum Circuits to Superconducting Processors

Quantum algorithms need to be compiled to respect the constraints imposed by quantum processors, which is known as the mapping problem. The mapping procedure will result in an increase of the number of gates and of the circuit latency, decreasing the algorithm's success rate. It is crucial to minimize mapping overhead, especially for noisy...

Graphene Nano-ribbon Patterning and Characterisation Towards Boolean Logic Gates

As CMOS scaling approaches the atomic feature size limit which results in a high power density and current leakage, low reliability and increased time and production cost, the need for new materials and devices is increasing. One of the promising materials to replace silicon based devices is graphene nano-ribbons (GNRs) due to its remarkable...

Characterization and modeling of mismatch in Cryo-CMOS

This paper presents a device matching study of a commercial 40-nm bulk CMOS technology operated at cryogenic temperatures. Transistor pairs and linear arrays, optimized for device matching, were characterized over the temperature range from 300 K down to 4.2 K. The device parameters relevant for mismatch, i.e., the threshold voltage and the...

N-bit Data Parallel Spin Wave Logic Gate

Due to their very nature, Spin Waves (SWs) created in the same waveguide, but with different frequencies, can coexist while selectively interacting with their own species only. The absence of inter-frequency interferences isolates input data sets encoded in SWs with different frequencies and creates the premises for simultaneous data parallel...

4-output Programmable Spin Wave Logic Gate

To bring Spin Wave (SW) based computing paradigm into practice and develop ultra low power Magnonic circuits and computation platforms, one needs basic logic gates that operate and can be cascaded within the SW domain without requiring back and forth conversion between the SW and voltage domains. To achieve this, SW gates have to possess...

A Formal Graphical Language of Interdependence in Teamwork

Agents in teamwork may be highly interdependent on each other, the awareness of interdependence relationships is an important requirement for designing and consequently implementing a multi-agent system. In this work, we propose a formal graphical and domain-independent language that can facilitate the identification of comprehensive...

Dynamic Threshold Detection Based on Pearson Distance Detection

We consider the transmission and storage of encoded strings of symbols over a noisy channel, where dynamic threshold detection is proposed for achieving resilience against unknown scaling and offset of the received signal. We derive simple rules for dynamically estimating the unknown scale (gain) and offset. The estimates of the actual gain...

CMOS Image Sensor for Lateral Flow Immunoassay Readers

Point-of-care systems for the detection of infectious diseases are in great demand especially in developing countries. Lateral flow immunoassays are considered ideal biosensors for point-of-care diagnostics due to their numerous advantages. However, to quantify their results a low power, robust electronic reader is needed. A low power CMOS...

Balanced ternary addition using a gated silicon nanowire

Ternary logic has the lowest cost of complexity, here, we demonstrate a CMOS hardware implementation of a ternary adder using a silicon metal-on-insulator single electron transistor. Gate dependent rectifying behavior of a single electron transistor (SET) results in a robust three-valued output as a function of the potential of the single...