Bi-Directional Tuning of Josephson Junction Resistance

One of the main components used in superconducting quantum chips is the Josephson junction. Currently when fabricating Josephson junctions, the resistance uniformity at wafer-scale is not optimal. It is also known that an annealing process can alter the junction resistance and with it the qubit frequency. However, laser annealing has only shown...

Modeling Soft-Error Reliability Under Variability

The Soft-Error (SE) reliability and the effects of Negative Bias Temperature Instability (NBTI) in deep submicron technologies are characterized as the major critical issues of high-performance integrated circuits. The previous scientific research studies provide a comprehensive description that the soft-error vulnerability becomes more severe...

A System-Level Aging and Mitigation Assessment Simulation Framework

As technology scaling enters the nanometer regime, device aging effects cause quality and reliability issues in CMOS Integrated Circuits (ICs), which in turn shorten its lifetime. Evaluating system aging through circuit simulations is very complex and time consuming. In this thesis, a framework is proposed, which allows for the evaluation of...