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Karatza, Dimitra (author)The current trend towards the integration of artificial intelligence (AI) and graphics processing unit (GPU) technologies has resulted in the development of embedded hybrid GPU-AI accelerators, which offer high computational power and energy efficiency. One of the key challenges in designing such accelerators is ensuring their timing correctness...master thesis 2023
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Pathak, Karan (author)Computer Architects often walk the tightrope between performance, power and area while designing modern day processors. This daunting task is made even more challenging by short Time-to-Market requirements set by the clients. In light of these challenges, architectural simulators provide a much needed tool for the architects to gauge the impact...master thesis 2023
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Costantini, Jacopo (author)RISC-V is an open-source Instruction Set Architecture that offers a simple, modular, and scalable design. Its extensions allow for customization and optimization based on specific execution workloads. One of these workloads could be quantum computing, which exploits the concepts of superposition and entanglement to manipulate qubits and perform...master thesis 2023
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Li, H. (author), Mentens, Nele (author), Picek, S. (author)SHA-3 is considered to be one of the most secure standardized hash functions. It relies on the Keccak-f[1 600] permutation, which operates on an internal state of 1 600 bits, mostly represented as a 5 x 5 x 64-bit matrix. While existing implementations process the state sequentially in chunks of typically 32 or 64 bits, the Keccak-f[1 600]...conference paper 2023
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Garcia Ezquerro, Ignacio (author)The number of IoT devices and their applications is projected to continue increasing in the future, creating a demand for low-power wireless communications that allow IoT devices to either be connected directly to the internet or to use other devices as a back gate to it. BLE is already one of the most used wireless communication protocols for...master thesis 2022
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Sun, Chen (author)The prosperity of the Internet-of-Things (IoT) imposes increasing demand on endpoint microcontroller-based devices' performance and energy efficiency. The MCUs are demanded to process the raw data acquired from the sensors with the integer-based workload, such as digital signal processing (DSP) algorithms and quantized neural network (QNN)...master thesis 2022
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Di Mascio, S. (author)The usage of terrestrial processors in space applications is not straightforward, as processors in space face unique challenges due to the effects of the space environment, like ionizing radiation causing Single Event Effects (SEEs). In the nineties, the European Space Agency chose the Scalable Processor ARChitecture (SPARC) Instruction Set...doctoral thesis 2022
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Geijsen, Kamron (author)This paper presents a preliminary study of the set of trade-offs of UC-Berkley’s RISC-V instruction set architecture experiences, due to its lack of the Scaled Index addressing mode. The strong majority of the popular Instruction Sets such as x86, ARM, MIPS and PowerPC include relatively complex ways to calculate memory addresses (addressing...bachelor thesis 2022
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Li, H. (author), Mentens, Nele (author), Picek, S. (author)This paper uses RISC-V vector extensions to speed up lattice-based operations in architectures based on HW/SW co-design. We analyze the structure of the number-theoretic transform (NTT), inverse NTT (INTT), and coefficient-wise multiplication (CWM) in CRYSTALS-Kyber, a lattice-based key encapsulation mechanism. We propose 12 vector extensions...conference paper 2022
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Koffas, S. (author), Vadnala, Praveen Kumar (author)We investigate the influence of clock frequency on the success rate of a fault injection attack. In particular, we examine the success rate of voltage and electromagnetic fault attacks for varying clock frequencies. Using three different tests that cover different components of a System-on-Chip, we perform fault injection while its CPU...conference paper 2022
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Cassano, Luca (author), Di Mascio, S. (author), Palumbo, Alessandro (author), Menicucci, A. (author), Furano, Gianluca (author), Bianchi, Giuseppe (author), Ottavi, Marco (author)Integrated circuits employed in space applications generally have very low-volume production and high performance requirements. Therefore, the adoption of Commercial-Off-The-Shelf (COTS) components and Third Party Intellectual Property cores (3PIPs) is of extreme interest to make system design, implementation and deployment cost-effective and...conference paper 2022
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Annink, Edian B. (author), Rauwerda, Gerard (author), Hakkennes, Edwin (author), Menicucci, A. (author), Di Mascio, S. (author), Furano, Gianluca (author), Ottavi, Marco (author)Soft errors in embedded systems' memories like single-event upsets and multiple-bit upsets lead to data and instruction corruption. Therefore, devices deployed in harsh environments, such as space, use fault-tolerant processors or redundancy methods to ensure critical application dependability. Another rising concern in secure, critical space...conference paper 2022
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Koene, Davy (author)With the increase in the amount of data being gathered, the need for data processing is also rising. Furthermore, in addition to the proprietary ISAs that have been prevalent, the free and open RISC-V ISA has seen major interest. The modularity of the RISC-V ISA allows it to be extended with many instruction set extensions. One such extension...master thesis 2021
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Smit, Jasper (author)An application-specific instruction set processor (ASIP) can provide for higher power and computationalefficiency compared to general-purpose processors. These attributes are essential for implantable medicaldevices which often run computationally intensive tasks on a strict power budget. This thesis compilesa collection of benchmarks by porting...master thesis 2021
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Talluri, Pavan (author)The adoption of Microprocessors is increasingly diversifying to several embedded and mo- bile devices. Growingly they can also be found in Smart Cards, RFID tags, SIM cards, Pay TVs, identity cards and passports. These devices store, processes and transact sensitive information like social security numbers and credit card numbers. Ensuring...master thesis 2020
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van Rijnsoever, Xavier (author)Software bugs in many different variants can potentially leak sensitive data to an attacker. Implementing a separation mechanism for security domains can prevent incorrect or malicious code to leak sensitive data from one security domain to another. This work presents a separation mechanism based on labeling security domains with a label in...master thesis 2020
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Schriek, E. (author), Sebastiano, F. (author), Charbon-Iwasaki-Charbon, E. (author)We present a digital cell library optimized for 4.2 K to create controllers that keep quantum processors coherent and entangled. The library, implemented on a standard 40-nm CMOS technology, was employed in the creation of the first 4.2 K RISC-V processor. It has achieved a minimum supply voltage of 590 mV, energy-delay product of 37 fJ/MHz,...journal article 2020
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Ntasios, Angelos (author)The last years, there has been a increasing trend in embedded system and FPGA im-plementations for greater flexibility and also, a rising adaptation of heterogeneous plat-forms. These platforms often include FPGAs and embedded cores side by side.ρ-VEXcore, developed and maintained by the Computer Engineering group of TU Delft, is aVLIW processor...master thesis 2019
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Verhage, A.A. (author)Technolution B.V. is developing a custom Reduced Instruction Set Computer (RISC)-V based softcore for implementation on a Field Programmable Gate Array (FPGA). Previously, the softcore used the memory residing on the FPGA only, which is very limited in capacity and limits scaling. To solve this problem, a connection is made from the softcore to...master thesis 2016
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Heida, W.F. (author)As predicted by Gordon E. Moore in 1975, the number of transistors has doubled every two years over the last decades. This technology scaling led to a higher performance of Integrated Circuits (ICs) like processors, but have also made these devices more susceptible to Single Event Effects (SEEs). SEEs are caused by transistors changing state...master thesis 2016