The Zoom ADC: An Evolving Architecture

Zoom ADCs combine a coarse SAR ADC with a fine delta-sigma modulator (?SM) to efficiently obtain high energy efficiency and high dynamic range. This makes them well suited for use in various instrumentation and audio applications. However, zoom ADCs also have drawbacks. The use of over-ranging in their fine modulators may limit SNDR, large...

A linearity improvement method for CIS column-parallel SAR ADC using two-step conversion

This paper presents a new 2-step SAR ADC architecture for image sensors in machine vision applications. This structure effectively improves the structural problems of the image sensor caused by the area occupied by the ADC, such as linearity and temporal noise performance. In this work, we designed a two-step SAR ADC using a 6-bit SAR ADC and...

An 11-bit 2MS/s column parallel SAR-RAMP ADC for ToF imager readout

Time-of-Flight (ToF) is an optical range detection technique that derives range from the round-trip time of light pulse between the imager and the target. Due to the simple hardware and distance extraction algorithm, ToF imagers are widely adopted in existing (automotive, consumer electronics, etc.) and emerging (AR/VR, etc.) applications...

A Monolithic Photoplethysmogram (PPG) Sensor

A photoplethysmogram (PPG) is an important optically-obtained bio-signal that enables convenient daily monitoring of heart rate and oxygen saturation (SpO2). Most state-of-the-art PPG sensing systems require an off-chip photodiode, and the photodiode's output parasitic capacitance limits the power-noise trade offs. The objective of this project...

A 590 μw, 106.6 dB SNDR, 24 kHz BW Continuous-Time Zoom ADC with a Noise-Shaping 4-bit SAR ADC

This paper presents a continuous-Time zoom ADC for audio applications. It combines a 4-bit noise-shaping coarse SAR ADC and a fine delta-sigma modulator with a tail-resistor linearized OTA for improved linearity, energy efficiency, and handling of out-of-band interferers compared to previous designs. In 160 nm CMOS, the prototype chip...

A 10-b 330nW Third-Order Predictive SAR ADC Dedicated to Neural Recording Brain Implants

This paper reports on a predictive analog-todigital converter (ADC). The proposed ADC employs a linear predictive filter to prepare a prediction for the current sample based on the values of the previous digital codes. This leads to significant reduction in the mean bit cycle of the converter. It is shown in this work that this idea is...

A Continuous-Time Zoom ADC for Audio Applications based on a High-Linearity OTA and a 4-bit SAR ADC

Analog-to-Digital Converters (ADCs) used in high fidelity audio applications require high linearity and a wide dynamic range (>100 dB). Moreover, for use in portable electronic devices such as smartphones, tablets, and hearing aids, these ADCs must also achieve high energy efficiency. This requirement of high linearity and high energy...

An ultrasound receiver channel for vagus nerve imaging

The neuromodulation modality based on the focused ultrasonic stimulation (FUS) has gained its interests for being non-invasive while having unprecedented high spatial resolution and deep penetration. The commercially available image-guided FUS device for neuromodulation setups are normally bulky, by employing an 1-D array transducer element to...

A CMOS Image Sensor with Thermal Sensing Capability and Column Zoom ADCs

This paper presents a CMOS image sensor (CIS) with a zoom ADC, to quantize in-pixel temperature sensors, as well as for faster readout speed of the image pixels while maintaining low quantization noise. The proposed 15 bit zoom ADC has a 4 bit Unit Capacitor Array (UCA) SAR and a 13 bit incremental 2^nd-order delta-sigma ADC (DSADC)...

An Error Feedback Noise Shaping SAR ADC

Analog-to-digital converters are important blocks in any electronic system which act as a bridge between analog signals and digital processors. The conventional SAR ADC employs a binary search algorithm and has emerged as the most suitable solution for low-power applications, due to its excellent power efficiency. The proposed ADC architecture...

A 1-Mega Pixels HDR and UV Sensitive Image Sensor With Interleaved 14-bit 64Ms/s SAR ADC

This thesis presents a 1-Mega pixels high-dynamic range and UV sensitive image sensor in 0.18 µm technology with 14-bit interleaved 64Ms/s SAR ADC. It can achieve 64 fps and 101 dB dynamic range. The pixel array contains three kinds of pixel: UV pixel, visible pixel and low blue pixel. Those three kinds of pixel form a special 4×4 kernel to meet...

A 6.3 μW 20 bit Incremental Zoom-ADC with 6 ppm INL and 1 μV Offset

A 20-bit incremental ADC for battery-powered sensor applications is presented. It is based on an energy-efficient zoom ADC architecture, which employs a coarse 6-bit SAR conversion followed by a fine 15-bit ΔΣ conversion. To further improve its energy efficiency, the ADC employs integrators based on cascoded dynamic inverters for extra gain and...

A low noise, low power dynamic amplifier with common mode detect and a low power, low noise comparator for pipelined SAR-ADC

This thesis presents a high gain, low noise and low power dynamic residue amplifier and a low power, low noise dynamic comparator designed in TSMC 28nm process for a two step Pipelined SAR-ADC. The cascoded integrator dynamic residue amplifier (CIDRA) achieves a gain of 30dB with THD of 47dB (11 mV pp input). The input referred noise across tem-...