Searched for: subject%3A%22Wafer%255C+level%255C+chip%255C-scaled%255C+packaging%22
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document
Thukral, V. (author), van Soestbergen, M. (author), Zaal, J.J.M. (author), Roucou, R. (author), Rongen, R.T.H. (author), van Driel, W.D. (author), Zhang, Kouchi (author)
Board level vibration testing is intended to assess prediction of the reliability of solder joint interconnects that are formed between electronic components and printed circuit boards (PCB). Frailties in the stress test experiment might lead to false board level reliability (BLR) evaluations. Therefore, it is essential to have a well...
review 2022
document
Yuan, Cadmus (author), Fan, Xuejun (author), Zhang, Kouchi (author)
Solder joint fatigue is one of the critical failure modes in ball-grid array packaging. Because the reliability test is time-consuming and geometrical/material nonlinearities are required for the physics-driven model, the AI-assisted simulation framework is developed to establish the risk estimation capability against the design and process...
journal article 2021