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Li, Shenyang (author)
This thesis describes the design of a 3rd order 1-bit delta-sigma modulator whose input-signal range (0 to 1.95V) exceeds its supply voltage (1.2V). By using a passive input stage and a single-OTA resonator, this beyond-the-rails modulator realizes a 3rd order loop filter with only two amplifiers instead of the usual three and thus achieves...
master thesis 2023
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Pecanins Martínez, Victor (author)
Several techniques have been proposed to reduce the swing at the input stage of a CTDSM. One of these is using a simple passive RC input stage. In prior works, this increased in-band quantization noise. In this paper, we use positive feedback to realize complex-conjugate poles with a passive input stage, obtaining the same noise-shaping as an...
master thesis 2022