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document
Verschoor, M. (author)
Interconnect centric security in multi core System-on-Chip (SoC) is an area of increasing concern. Monitoring and manipulation of the SoC interconnect yields great potential to bypass higher level security mechanisms. This thesis proposes SoC-TLS: a cryptographic hardware solution aimed to protect intra SoC communication against malicious IP and...
master thesis 2011
document
Van den Berg, A. (author), Ren, P. (author), Marinissen, E.J. (author), Gaydadjiev, G. (author), Goossens, K. (author)
Test data travels through a System on Chip (SOC) from the chip pins to the Core-Under-Test (CUT) and vice versa via a Test Access Mechanism (TAM). Conventionally, a TAM is implemented using dedicated communication infrastructure. However, also existing functional interconnect, such as a bus or Network on Chip (NOC), can be reused as TAM; this...
journal article 2010