Interconnect Testing for 3D Stacked Memories

Three-dimensional stacked ICs (3D-SICs) technology based on Through-Silicon Vias (TSVs) provides numerous advantages as com- pared to traditional 2D-ICs. TSVs are holes going vertically through the chip silicon substrate filled with a conducting material. A potential application is a 3D-SIC where one or more memory dies are stacked on a logic...