Failure probability estimation of natural gas pipelines due to hydrogen embrittlement using an improved fuzzy fault tree approach

The estimation of failure probability is challenging in hydrogen embrittlement in steel pipelines due to the complexity of the synergistic effect of multiple factors. The present study proposed a hybrid methodology to estimate the failure probability of steel pipelines due to hydrogen embrittlement. The methodology integrates the fault tree...

Condition assessment of underground corroded pipelines subject to hydrogen damage and combined internal pressure and axial compression

In this work, a 3D finite element (FE) based model was developed to assess the condition of an underground hydrogen transmission pipeline containing a corrosion defect under combined internal pressure and soil movement-induced axial compression. The use of mechanical properties of X100 pipeline steel under different hydrogen charging time...

Data-driven Methods to Predict the Burst Strength of Corroded Line Pipelines Subjected to Internal Pressure

A corrosion defect is recognized as one of the most severe phenomena for high-pressure pipelines, especially those served for a long time. Finite-element method and empirical formulas are thereby used for the strength prediction of such pipes with corrosion. However, it is time-consuming for finite-element method and there is a limited...

Centrifuge modelling of pipelines shallowly embedded in liquefied submarine slopes

Marine pipelines are widely used for transporting hydrocarbon material. However, they can be damaged by marine geo-hazards such as seabed liquefaction, as they may sink, float or be dragged by the moving soil. One of the triggering mechanism of seabed liquefaction is the increase of seabed inclination as a result of the souring process or human...

A 10-bit 25Msps Pipeline ADC for Companding Baseband Processing in Wireless Application

A pipelined ADC core consumes 28mW with 60.3dB SNDR, 78dB SFDR and 76dB IMD3 is obtained. Combined with expander, extra 12dB DR is achieved with equal dynamic performance because companding takes place. Compared to conventional baseband interface, power dissipation is reduced by a factor of 3.3.

4 Bits 250MHz Sampling Rate CMOS Pipelined Analog-to-Digital Converter

a 4-bit 250MHz sampling rate pipelined A/D converter, with 1.5-bit resolution per stage, has been designed by Cadence using TSMC 0.13um CMOS process. The ADC which works at 1.2 V supply voltage dissipates 15.23 mW and has an ENOB of 3.7 bits @ 100MHz sampling condition. The maximum DNL is 0.38 LSB, and the maximum INL is 0.352 LSB