Polyhedral Compilation for Data Flow Computers

The increasing transistor density of Integrated Circuits (ICs) ever since their introduction, has scaled the computational performance of microprocessors. As a consequence of the gain in transistor density, the power dissipation density has also increased to a degree that has become a limiting factor in further performance scaling. The prevalent...

Validation of Performance Estimation, Channel Sizing and Automatic Loop Transformations of High Level Specifications for Polyhedral Process Network

In this thesis, we present Cprof+, an upgraded version of Cprof. Cprof+ is a lightweight profiling tool for Polyhedral Process Networks (PPN) that can estimate the performance of a C-program as a PPN implemented in hardware. Cprof+ improves the set of possible programs that can be successfully profiled, by increasing the performance estimation...

Determining Performance Boundaries and Automatic Loop Optimization of High-Level System Specifications

Designers are confronted with high time-to-market pressure and an increasing demand for computational power. As a result, they are required to identify as early as possible the quality of a specification for an intended technology. The designer needs to know if this specification can be improved, and at what cost. Specification trade-offs are...