A Fully Integrated Discrete-Time Superheterodyne Receiver

The zero/low intermediate frequency (IF) receiver (RX) architecture has enabled full CMOS integration. As the technology scales and wireless standards become ever more challenging, the issues related to time-varying dc offsets, the second-order nonlinearity, and flicker noise become more critical. In this paper, we propose a new architecture of...

A high IIP2 SAW-less superheterodyne receiver with multistage harmonic rejection

In this paper, we propose and demonstrate the first fully integrated surface acoustic wave (SAW)-less superheterodyne receiver (RX) for 4G cellular applications. The RX operates in discrete-time domain and introduces various innovations to simultaneously improve noise and linearity performance while reducing power consumption: a highly linear...

Fully Integrated SAW-Less Discrete-Time Superheterodyne Receiver

There are nowadays strong business and technical demands to integrate radio- frequency (RF) receivers (RX) into a complete system-on-chip (SoC) realized in scaled digital processes technology. As a consequence, the RF circuitry has to function well in face of reduced power supply ( V DD ) while the CMOS device threshold voltage ( V th ) stays...