Searched for: subject%3A%22sram%22
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Damsteegt, Rob (author)
Scalable universal quantum computers require classical control hardware, physically close to the quantum devices at cryogenic temperatures. Such classical controllers need digital memory for various applications, ranging from high-speed queues to high-speed and low-speed lookup tables and working memory. The power consumption of the memories...
master thesis 2022
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Cardoso Medeiros, G. (author)
The Fin Field-Effect Transistor (FinFET) technology became the most promising approach to enable the downscaling of technological nodes below the 20 nm threshold. However, the introduction of new technology nodes for embedded memories such as SRAMs, especially for even smaller nodes such as 10 and 5 nm, gives rise to new manufacturing failure...
doctoral thesis 2022
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Masoumian, S. (author), Selimis, Georgios (author), Wang, Rui (author), Schrijen, Geert-Jan (author), Hamdioui, S. (author), Taouil, M. (author)
SRAM Physical Unclonable Functions (PUFs) are among other things today commercially used for secure primitives such as key generation and authentication. The quality of the PUFs and hence the security primitives, depends on intrinsic variations which are technology dependent. Therefore, to sustain the commercial usage of PUFs for cutting-edge...
conference paper 2022
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Cardoso Medeiros, G. (author), Fieback, M. (author), Gebregiorgis, A.B. (author), Taouil, M. (author), Bolzani Poehls, L. (author), Hamdioui, S. (author)
Manufacturing defects in FinFET SRAMs can cause hard-to-detect faults such as Random Read Faults (RRFs). Detection of RRFs is not trivial, as they may not lead to incorrect outputs. Undetected RRFs become test escapes, which might lead to no-trouble-found devices and early in-field failures. Therefore, the detection of RRFs is of utmost...
conference paper 2021
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Cardoso Medeiros, G. (author), Fieback, M. (author), Wu, L. (author), Taouil, M. (author), Bolzani Poehls, L. M. (author), Hamdioui, S. (author)
Manufacturing defects can cause hard-to-detect (HTD) faults in fin field-effect transistor (FinFET) static random access memories (SRAMs). Detection of these faults, such as random read outputs and out-of-spec parametric deviations, is essential when testing FinFET SRAMs. Undetected HTD faults result in test escapes, which lead to early in-field...
journal article 2021
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Cardoso Medeiros, G. (author), Fieback, M. (author), Copetti, Thiago (author), Gebregiorgis, A.B. (author), Taouil, M. (author), Bolzani Poehls, L. M. (author), Hamdioui, S. (author)
Manufacturing defects in FinFET SRAMs can cause hard-to-detect faults such as Undefined State Faults (USFs). Detection of USFs is not trivial, as they may not lead to incorrect functionality. Nevertheless, undetected USFs may have a severe impact on the memory's quality: they can cause random read outputs, which might lead to test escapes and no...
conference paper 2021
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Copetti, Thiago (author), Cardoso Medeiros, G. (author), Taouil, M. (author), Hamdioui, S. (author), Poehls, Leticia Bolzani (author), Balen, Tiago (author)
Fin Field-Effect Transistor (FinFET) technology enables the continuous downscaling of Integrated Circuits (ICs), using the Complementary Metal-Oxide Semiconductor (CMOS) technology in accordance with the More Moore domain. Despite demonstrating improvements on short channel effect and overcoming the growing leakage problem of planar CMOS...
journal article 2021
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Hamburger, Rens (author)
The aggressive downscaling of the transistor has led to gigantic improvements in the performance and func- tionality of electronics. As a result, electronics have become a significant part in our daily lives whose absence would be difficult to imagine. Our cars, for example, now consist of many sensors and small computers each controlling...
master thesis 2020
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Copetti, Thiago (author), Cardoso Medeiros, G. (author), Taouil, M. (author), Hamdioui, S. (author), Poehls, Leticia Bolzani (author), Balen, Tiago (author)
Fin Field-Effect Transistor (FinFET) technology enables the continuous downscaling of Integrated Circuits (ICs), using the Complementary Metal-Oxide Semiconductor (CMOS) technology in accordance with the More Moore domain. Despite demonstrating improvements on short channel effect and overcoming the growing leakage problem of planar CMOS...
conference paper 2020
document
Cardoso Medeiros, G. (author), Cem Gursoy, Cemil (author), Wu, L. (author), Fieback, M. (author), Jenihhin, Maksim (author), Taouil, M. (author), Hamdioui, S. (author)
Manufacturing defects can cause faults in FinFET SRAMs. Of them, easy-to-detect (ETD) faults always cause incorrect behavior, and therefore are easily detected by applying sequences of write and read operations. However, hard-to-detect (HTD) faults may not cause incorrect behavior, only parametric deviations. Detection of these faults is of...
conference paper 2020
document
Masoumian, S. (author), Selimis, Georgios (author), Maes, Roel (author), Schrijen, Geert-Jan (author), Hamdioui, S. (author), Taouil, M. (author)
In this paper, we develop an analytical PUF model based on a compact FinFET transistor model that calculates the PUF stability (i.e. PUF static noise margin (PSNM)) for FinFET based SRAMs. The model enables a quick design space exploration and may be used to identify critical parameters that affect the PSNM. The analytical model is validated...
conference paper 2020
document
Cardoso Medeiros, G. (author), Taouil, M. (author), Fieback, M. (author), Bolzani Poehls, L. M. (author), Hamdioui, S. (author)
Hard-to-detect faults such as weak and random faults in FinFET SRAMs represent an important challenge for manufacturing testing in scaled technologies, as they may lead to test escapes. This paper proposes a Design-for-Testability (DFT) scheme able to detect such faults by monitoring the bitline swing of FinFET memories. Using only five...
conference paper 2019
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Setyawan Sajim, Ade (author)
SRAM PUF has a potential to become the main player in hardware security. Unfor- tunately, currently available solutions are usually locked to specific entities, such as companies or universities. Here, we introduce the first open source project to de- velop software-based SRAM PUF technology using off-the-shelf SRAM. We also present testing...
master thesis 2018
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Cardoso Medeiros, G. (author), Bolzani Poehls, L.M. (author), Taouil, M. (author), Luis Vargas, F. (author), Hamdioui, S. (author)
Resistive defects in FinFET SRAMs are an important challenge for manufacturing test in submicron technologies, as they may cause dynamic faults, which are hard to detect and therefore may increase the number of test escapes. This paper presents a defect-oriented test that uses On-Chip Current Sensors (OCCSs) to detect weak resistive defects...
journal article 2018
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Ishihara, R. (author), Zhang, J. (author), Trifunovic, M. (author), Derakhshandeh Kheljani, J. (author), Golshani, N. (author), Tajari Mofrad, M.R. (author), Chen, T. (author), Beenakker, C.I.M. (author), Shimoda, T. (author)
We review our recent achievements in monolithic 3D-ICs and flexible electronics based on single-grain Si TFTs that are fabricated inside a single-grain with a low-temperature process. Based on pulsed-laser crystallization and submicron sized cavities made in the substrate, amorphous-Si precursor film was converted into poly-Si having grains that...
journal article 2014
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Irobi, I.S. (author)
Emerging technology trends are gravitating towards extremely high levels of integration at the package and chip levels, and use of deeply scaled technology in nanometer, approaching 10nm CMOS. Challenges will arise due to the ability to design complex systems such as robots that encompass sensors, transducers, communications systems and...
doctoral thesis 2011
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Jain, V.R. (author)
Semiconductor memories are an inherent part of many modern electronic systems. Due to the fast development of memory process technology and the escalating computing speeds, the on-chip share of memories is rapidly increasing. Additionally, the quality and reliability requirements are becoming more severe especially for critical applications such...
master thesis 2011
document
Kukner, S.H. (author)
A Memory BIST architecture and implementation based on the novel concept of Generic and Orthogonal March Element
master thesis 2010
document
Khawar Sarfraz, K.S. (author)
master thesis 2009
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Golshani, N. (author)
In most of the electronics and communication devices such as mobile, video phone and handheld video games low power and high density SRAM (Static Random Access Memory) is a favor. On the other hand, integration of many functions such as digital, memory, RF and analog circuits is necessary in near future. Scaling is one of the solutions to...
master thesis 2009
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