System-level sub-20 nm planar and FinFET CMOS delay modelling for supply and threshold voltage scaling under process variation

Standard low power design utilizes a variety of approaches for supply and threshold control to reduce dynamic and idle power. At a very early stage of the design cycle, the V_dd and V_th values are estimated, based on the power budget, and then used to scale the delay and estimate the design performance. Furthermore,...

System-level feature-based modeling of cyber-physical systems: A theoretical framework and methodological fundamentals

Cyber-physical systems are complex trans-disciplinary systems. Designing this kind of systems requires cooperation of several groups of experts with various backgrounds such as mechatronics and robotics, software engineering, data management, knowledge engineering, system on a chip, embedded systems, humans and systems interaction, and social...

System-level Fault-Tolerance Analysis of Small Satellite On-Board Computers

Commercial Off-The-Shelf (COTS) electronic components offer cost-effective solutions for the development of On-Board Computers (OBCs) in the small satellite industry. However, the COTS parts are not originally designed to withstand the space radiation environment. Traditional fault-tolerance practices rely on expensive radiation tests or are...