Microfabricated albedo insensitive sun position sensor system in silicon carbide with integrated 3D optics and CMOS electronics

The next generation of satellites will need to tackle tomorrow's challenges for communication, navigation and observation. In order to do so, it is expected that the amount of satellites in orbit will keep increasing, form smart constellations and miniaturize individual satellites to make access to space cost effective. To enable this next...

Integrated silicon carbide sun position sensor system-on-chip for space applications

Wafer Level Through Polymer Optical Vias (TPOV) Enabling High Throughput of Optical Windows Manufacturing

This article shows the fabrication process and packaging of through polymer optical vias (TPOV). The TPOV enables encapsulation and packaging of silicon photonic systems using film assisted molding (FAM) and the creation of micron-sized through polymer optical vias. The optical vias are lithographically defined in thick film photo-resist (∼ 300...

Wafer Level Packaging With Nano Metal Paste Interconnects For UV-C LEDs

: Light emitting diodes (LEDs) have made remarkable progress since their invention and today they can be found in a wide range of applications such as TV remotes, automotive headlamps, general lighting, traffic signals, camera flashes, display and screens. LEDs that emit light in the ultraviolet-C (UV-C) range are used in applications such as...

Foldable 3D Wafer Level SSL Package Using Flexible Interconnect

Solid State Lighting (SSL) is on track to replace conventional incandescent and fluorescent sources for general lighting. Even though it offers many benefits, the high initial device costs are still a major hindrance for many consumers. Packaging can account for up to half of the total device price, offering high potential for cost reduction. In...

PECVD silicon carbide surface micromachining technology and selected MEMS applications

Attractive material properties of plasma enhanced chemical vapour deposited (PECVD) silicon carbide (SiC) when combined with CMOS-compatible low thermal budget processing provides an ideal technology platform for developing various microelectromechanical systems (MEMS) devices and merging them with integrated circuits. In this paper we present a...

Substrate Crosstalk Suppression Using Wafer-Level Packaging: Metalized Through-Substrate Trench Approach

The demand for miniaturization technology has been increasing over the last decades. Consumer electronics end-users often, if not always, go for more functionality and practicality. This is translated into systems that are more complex and yet smaller in size such as smart cellular phones and portable audio/video systems. System on Chip (SoC) is...

Robust Wafer-Level Thin-Film Encapsulation (Packaging) of Microstructures (MEMS) using Low Stress PECVD Silicon Carbide

This paper presents a new low-cost, CMOS-compatible and robust wafer-level encapsulation technique developed using a stress-optimised PECVD SiC as the capping and sealing material, imparting harsh environment capability. This technique has been applied for the fabrication and encapsulation of a wide variety of surface- and thin-SOI...