This thesis is about an innovative technique of designing a precision current mirror which enables us to achieve a very high DC accuracy with ripple free output signal, without using an external low pass filter to suppress the unwanted ripple. The word 'precision' here means that the current mirror has an accurately defined input-to-output relationship in terms of gain, linearity and offset. The idea behind this design is basically a combination of trimming followed by Dynamic element matching (DEM). Test chips are fabricated to test the functionality and performance of the new concept. The DC accuracy obtained from the mirror is 0.18% and AC ripple is suppressed by 50X compared to state-of-the-art. The chip area (without padring) is 0.84mm2. The supply voltage ranges from 11V to 40V. This design was done using a high performance analog process (50HPA07HV) from Texas Instruments (TI). This is a high voltage BiCMOS process (40V compatible) having minimum gate length of 0.6um analog devices compatible with 0.3um gate length digital.