The scalable simulation of neuron communication needs a large
amount of computing resources. The high throughput of data cause
the high requirement of interconnect network. This thesis is aimed
at the finding the efficient multi-FPGA connection for the neuron
network. First describe the characteristics of the network in terms
of the topology, routing and flow control. To find the efficient net-
work structure, analysis of the throughput for the different network
with different traffic pattern by considering the hopcount and band-
width are made. It shows that the multicast in mesh topology has
33% improvement comparing to unicast. Based on the interconnect
router architecture, a simulator is built to make a cycle accurate sim-
ulation in SystemC and test different traffic pattern by unicast and
multicast routing. To break the limitation of FPGA ports, the source
synchronous serdes connection is built by using the primitive in the
Xilinx FPGA. With the requirement of bandwidth, the possible solu-
tion of number of channels and the overhead are anaylsed.