With the rising demand for high-bandwidth, high-resolution current sensors, commonly used Hall-effect devices fall short due to their relatively high wide-band noise. The coil-Hall hybrid architecture addresses this issue by combining the Hall plate with a pick-up coil, known for its high SNR at high frequencies. This CMOS-compatible architecture achieves excellent noise and bandwidth performance while maintaining the ability to sense DC signals. However, this performance comes at the cost of increased complexity in combining, calibrating, and stabilizing the two distinct signal paths. This thesis thoroughly investigates the various challenges and trade-offs associated with this architecture and provides a comprehensive overview of potential system solutions. Additionally, the insights gained were used to design a prototype chip for SystematIC Design B.V. Seeking to reduce complexity, this led to the invention of a new system architecture. This new architecture effectively overcomes several challenging trade-offs that have hindered existing designs until now and is considered a promising approach for achieving even better performance in the future.

With the rising demand for high-bandwidth, high-resolution current sensors, commonly used Hall-effect devices fall short due to their relatively high wide-band noise. The coil-Hall hybrid architecture addresses this issue by combining the Hall plate with a pick-up coil, known for its high SNR at high frequencies. This CMOS-compatible architecture achieves excellent noise and bandwidth performance while maintaining the ability to sense DC signals. However, this performance comes at the cost of increased complexity in combining, calibrating, and stabilizing the two distinct signal paths. This thesis thoroughly investigates the various challenges and trade-offs associated with this architecture and provides a comprehensive overview of potential system solutions. Additionally, the insights gained were used to design a prototype chip for SystematIC Design B.V. Seeking to reduce complexity, this led to the invention of a new system architecture. This new architecture effectively overcomes several challenging trade-offs that have hindered existing designs until now and is considered a promising approach for achieving even better performance in the future.

The Lunar Zebro rover is a nano rover designed by student research team Lunar Zebro at the Technical University of Delft. This rover will be sent to the lunar surface to conduct scientific experiments. In order to protect the rover during transit and facilitate successful deployment onto the lunar surface, a rover deployment system was designed.

This thesis describes the design of the sensing and actuation part of the rover deployment control system. The thesis details the design of a system which is able to deploy 4 Non-Explosive Actuators by means of sequentially supplying more than 4A for 50ms to each NEA. This sequence is inhibited by a physical connection to the rover by means of an umbilical cord which can be overridden when the rover and microcontroller send an override signal at the same time. The system contains a heating element and two temperature dependent relaxation oscillators that can be used to regulate the temperature. Thermal regulation can function independently of a digital control system, but can also be managed by the microcontroller. In the case that the microcontroller experiences failure, the NEA activation sequence can be initiated by two control signals from the lander, to which the deployment system is attached.

The system has not been physically tested, but has been verified in simulation. The combination of all these subsystems uses a peak power of 1.1W in simulation.

A test printed circuit board was designed to incorporate the complete rover deployment control system. This board can be used to physically simulate the deployment of the four non-explosive actuators by means of glass fuses. The board also allows any equivalent NEA model to be used in order to verify the limits of the system.

The system meets all functional requirements in simulation. Future work regarding the design entails physical testing of the PCB and the resolution of two major vulnerabilities, namely its reliability on the stability of the lunar lander’s 28V supply as well as its inability to handle excessive thermal energy.

This report presents a bandgap reference voltage source that achieves 5-sigma Inaccuracy of ±0.5% from -40C to 150C under 16FFC process. This is the first time 16nm techniques are used in automotive products and the first time trying to realize analog circuits in such a process for in-vehicle network purposes. The report points to good behavior with only a small area and considerable power. It also proves that applying chopping to the circuit does not increase the area.

Class D amplifiers find widespread application in audio devices for driving load speakers, primarily due to their remarkable efficiency. Nonetheless, this enhanced efficiency often comes at the expense of reduced linearity. Hence, techniques for reducing Total Harmonic Distortion (THD) are important in the context of class D amplifiers.

The analysis of the distortion mechanisms is first presented. Specifically, emphasis is placed on the distortion generated within the power stage, encompassing aspects such as deadtime distortion and rising and falling time distortion. Both of them are found to be related to the input signal. Subsequently, the compensation technique is applied to the conventional class D amplifier to reproduce and cancel the error. The idea of the compensation approach involves modifying the amplitude of the triangular waveform based on the input signal. A 12 dB THD improvement is achieved in the concept verification section, which is conducted in LTspice.

The negative feedback serves as another technique to achieve THD reduction. A straightforward two-step design methodology is presented to avoid design iterations in the concept design phase. The phantom zero technique is applied when doing the frequency compensation of the feedback loop. The validation of the concept is performed through the use of SLICAP, while the circuit implementation and simulations are carried out within Cadence. Remarkably, this technique results in an impressive -111.8 dB THD reduction, achieved when the output power equals 1 W.

As electromagnetic waves cannot propagate sufficiently far in water, underwater communication is mainly performed using either acoustics or optics. However, none of these technologies have been proven to be completely effective in every situation. Therefore, research in new underwater communication systems can still bring large benefits to a wide range of different underwater technologies.
During this project, a promising new type of underwater communication system based on electric fields has been investigated. While two subgroups have been working on the characterization of the communication channel and different modulation techniques, this thesis focuses on the hardware needed for optimal communication. Moreover, this hardware includes both a low-noise receiver and a high power transmitter. An analysis of different design options, the detailed design of one of these options and the validation of the design are given in this report. However, to get a complete overview of the designed communication system and its performance, it is recommended to also read the other two thesis reports.

This thesis describes the design of a CMOS magnetic field sensor system for measuring electronic currents. A hybrid system, using Hall plates and a pick-up loop is chosen to obtain improved performance compared to conventional Hall based magnetic field sensors. The pick up loop enables to reduce the current consumption and increases the bandwidth of the system. The design of the pick-up loop and readout amplifier are described in detail. Simulation results of the pick-up loop signal path offer a factor 10 increase in bandwidth using 24% less current compared to a system consisting of two Hall plate channels.

Unmanned underwater vehicles benefit from communication with a high data rate on relatively small distances (under 100 m). Existing communication methods are not able to provide this or present other shortcomings. Therefore, this bachelor end project focuses on a new type of underwater communication, quasi-static electric field communication. The software and modulation techniques in such a communication system are covered in this thesis. This includes a detailed analysis of modulation techniques, and especially of differential methods such as pi/M-DPSK, which can be demodulated non-coherently. Our system implements OFDM and according to simulations, it is able to achieve data rates of up to 1 Mbit/s. Additionally, this research focuses on the effect of error correction coding on the performance of the system. Moreover, an adaptive data rate control system is designed. The efficiency of the system is optimized by a power distribution algorithm. Finally, suggestions are given for a communication protocol.

Modern communication systems have a strong need for low-cost and high-stability frequency references. Although low-cost crystal oscillators can easily be realized and are available to the market in large quantities, crystal oscillators with frequency stability in the ppb(10^{-9}) range over a wide temperature range are only available at high costs. In 2018, SemiBlocks B.V. proposed an improved technique so-called Multi-Mode Crystal Oscillator MMXO. The MMXO determines the output frequency through a triple mode oscillator and corrects this by an algorithm running on the internal microprocessor. The advantage of the MMXO is that it uses regular AT-Cut crystals and the whole circuitry can be implemented in silicon, and the frequency selective network is implemented by digital technology. This results in a low-cost and high-stability crystal oscillator solution.

However, the measurement result of the first generation MMXO showed that the large temperature dependent phase shift of the analog crystal chain significantly influences frequency stability of the MMXO. This inaccuracy is out of the compensation ability of the multi-mode system since it is highly dependent on the analog network rather than the crystal. For the improvement of the next generation MMXO product, this thesis aims at designing a CMOS crystal filter, which should reflect the characteristic of crystal accurately. Any change of resonance frequency of the tested crystal should accurately match that of the frequency characteristic of the crystal filter. The objective is to control frequency error below 10ppb for the three resonance tones of the tested crystal over -40 to 100 $^{\circ}$C.

The design of the crystal filter follows a structured methodology and combines analysis and simulations in Cadence together with SLICAP (Symbolic Linear
Circuit Analysis Program), which helps researchers quickly find the early design solution and show-stopper before circuit design. The crystal filter is a two-stage amplifier. The first stage is a transadmittance stage, which reflects the frequency characteristic of the crystal by a current output. The second stage is a transimpedance stage, which makes the output of the TA stage observable to the ADC of the MMXO system. The pre-layout simulations show the the frequency error of the base tone and the third overtone is close to $10$ ppb, while the fifth overtone has a large frequency error around $252$ ppb. The crystal filter allows full range input of the tested ADC and is stable under all typical corners, with
$12.83 \mu W$ power consumed by crystal, $95.6 mW/pixel$ total current usage, and the chip area $1.75\times 10^{-8} mm^2/pixel$. The output-referred noise PSD of the base tone and the third overtone is $3.4\times 10^{-13}V^2/Hz$ and $7.3\times 10^{-15}V^2/Hz$. which meets the noise requirements with enough design margin, while the fifth overtone fails with noise specs due to the quantization noise and aliased noise caused by ADC.

This thesis discusses the basic architecture, design details, circuit implementation, and measurements of a digital class D current driver.
The driver contains two main parts: a digital control loop and analog circuits.
Parts of the important part in the digital control loop contain noise shaper, plant compensator, and cable capacitance compensator. The noise shaper has two core functions: 1. It seeks to minimize the difference between the process variable and the set point. 2. It shapes the noise that is generated in the forward loop. The plant compensator is used to compensate for the output filter, the load, and the cable. The cable capacitance compensation is a measure-based technique to generate a negative output capacitance to compensate for the cable capacitance. The analog circuits consist of a full bridge, data acquisition circuits, and floating supplies.
Multiple simulation models have been made in Matlab. According to the simulation results, the amplifier shows its flexibility and performance to handle a large range of inductive loads.
A prototype has been implemented. The measurement results show that most of the hardware performance is as intended. Due to the time limitation, the whole amplifier is not tested.

The need to understand how the brain works has sparked interest in electrode arrays to record neural signals. Intracellular recordings with nanoelectrodes that penetrate the cell allow better signal quality and additional functions such as voltage clamping to set the neuron's transmembrane voltage. The voltage clamp aims to facilitate the independent study of the ionic channel contributions to the overall neuron's transmembrane current for applications such as drug screening. This thesis aims to design a voltage clamp with CMOS technology to integrate into an intracellular neural interface system. The circuit, a trans-impedance amplifier, needs to be low-noise, small, and have wide clamping and output voltage ranges. The amplifier's design follows a structured methodology and uses symbolic analysis with the software SLiCAP and simplified EKV models aiming for easier readjustments and transparency for other researchers. The controller is an Operational Amplifier with a differential pair input-stage, an unbalanced common-source output-stage, and frequency compensation. The feedback network is a pseudo-resistor due to the enormous gains required to record the currents in the electrode of about 100 pA - 1 nA. The final simulations estimate a trans-impedance gain from the electrode to the load range of [2 M,1 G] V/A, a clamping voltage range of [0.90, 3.16] V, an output voltage range of [0.50, 3.16] V, and an output-referred noise between 0.095 and 0.41 mV_rms depending on the gain. The power usage is 49.1 uW/pixel and the area 0.0092 mm²/pixel. Post-layout simulations show stability degradation due to the influence of parasitics in the pseudo-resistor.

Space launches have been steadily increasing over the years as satellites are being used in various applications such as communication, military, and science. The costs of launching satellites are still high and depend on the dimensions and weight of the satellite. With the advancement in the field of autonomous robotics and telecommunications, the need for multiple satellites in swarms and constellations is also growing. Cubesats have emerged as an alternative for these issues as they provide a low cost and compact solution. After the successful launch of NCLE (Netherlands China Low-Frequency explorer), a radio astronomy payload in the Chang'e 4 mission, efforts are being made to reduce the size of the payload to meet the cubesat standards. This work aims at investigating the design and implementation of a sensitive radio receiver for low-frequency radio astronomy from the lunar orbit with a cubesat platform. The aim is to study the practical aspects involved in realizing the design and improving the sensitivity of the instrument. The science objectives are similar to that of the NCLE payload which includes the frequency band of 80 kHz-80 MHz with high dynamic range and linearity. The thesis is a step further in the project OLFAR which aims to have a swarm of satellites in the lunar orbit to perform long-baseline interferometry at low frequencies. This work focuses on the analog signal chain of the payload which contains the antenna, low noise amplifier, filters, and the ADC. For the design of the antenna, the antenna length, efficiency, and IXR of three antenna configurations have been presented. As radio frequency interference poses a problem during the design of the amplifier chain, the effects and coupling mechanisms of RFI have also been studied. Limits on all internal and external instruments for radiated emissions have been set for the design to be sky noise limited. The amplifier design takes the science cases into account and is designed to achieve the required sensitivity, using a structured electronic design approach. The implementation of the amplifier chain was done with discrete components at ASTRON (Netherlands Institute for Radio Astronomy) and measurement results have also been discussed at the end.

The goal of this bachelor thesis is to develop a control system that controls the temperature of a microthruster. This system also needs to acquire data for research. The microthruster contains a resistor that is used both as a heater and as a sensor. To facilitate the acquisition of data and the testing of the control system, a lab setup with a Keithley 2450 SourceMeter power supply was used. LabVIEW was used to control the power supply and to execute the control algorithms. The final system consists of a microcontroller that runs the control algorithms based on proportional-integral-derivative (PID) control developed in this thesis. The PID values can be adapted with use of the graphical user interface (GUI). A read-out circuit and current supply will be part of the integrated system. These circuits will be developed by other groups that are part of this bachelor project.

The objective of the project is to design a system which can control the temperature of a va-porizing liquid microthruster (VLM). The liquid in a VLM is heated using a heater resistor.This resistor will be used to both heat the liquid and measure the temperature.In this thesis the subsystem responsible for the measurements and the conversion of the mea-sured signals to the digital domain will be discussed. We propose a method where short measure-ment current pulses of a fixed amplitude are applied to the heater resistor. As an optimization,these pulses are omitted when a certain current threshold has been met.Results show that the system can measure temperature with±1◦C accuracy, however more fullsystem measurements are required to ensure functionality as a whole.