On the Design and Analysis of Micro-metric Resolution Arrays in Integrated Technology for Near-Field Dielectric Spectroscopy Medical procedures and treatments have a great impact on the quality of life as well as on the health care costs. Increasing number of cases pertaining to skin cancer have been documented by the International Agency for Research on Cancer (IARC) [80, 81] every year. The most commonly used surgical technique for the skin cancer treatment is the Mohs surgery, whereby thin layers of skin containing cancer tissue are removed until only cancer free tissue remains. Reducing the number of iterations and in turn the surgery time during a Mohs surgery [82] would reduce patient's discomfort and medical costs. Having a fast, accurate and non-invasive diagnostic tool for the detection of anomalies would provide an additional assistance during the Moh's surgery to assess the depth of the tissue removal resulting in few iterations. On the other hand, horticulture sector represent a very large market in several parts of the world. Enabling techniques to better assess the quality of the product during the entire supply chain process would result in high quality deliverables. Moreover, characterization of materials/objects with high accuracy is applicable to other scenarios that can be addressed by dielectric spectroscopy (e.g., surface quality inspection), which plays a role in many fabrication processes. To address these needs, this work targets at developing models based on spectral method of moments to characterize multilayered samples for two near-_eld systems, _rst that of an open-ended coaxial probe and second, a matrix of near-_eld permittivity sensors in integrated technology. @en

In this article, we present an analytical formulation based on an equivalent circuit model to support the challenging task of designing and analyzing single-ended patch sensing elements to be integrated in planar technologies. The proposed approach further allows for differentiating the permittivity values of the individual layers when sensing over dense and stratified mediums. The equivalent model of the sensing pixel is derived resorting to equivalence theorem and transmission-line theory. The relative impact of the material under test and the metal thickness of the sensing element is accurately included in the evaluation of the endpoint load of the radial transmission line, equivalent to the patch radius. This approach of representing the single-ended sensing element isolates the capacitance contributions associated with the patch radius, patch thickness, and the medium under test. The computationally fast tool is further utilized in absolute permittivity measurements using a 0.14- μm CMOS 2-D permittivity imaging matrix prototype operating from 100 MHz to 2.9 GHz, reporting excellent agreement with theoretical values.@en

We present a compact, scalable, and broadband architecture for the implementation of complex microwave permittivity sensors in complementary metal-oxide semiconductor (CMOS) technology. The proposed architecture consists of a patch sensor embedded in a programmable balanced readout bridge and performs third and fifth harmonic downconversion for fast multi-frequency readout. Circuits designed can act as the basic building block for a wide span of biomedical applications, ranging from wearables to permittivity imaging. Experimental results of manufactured prototypes demonstrate measurement noise reduction through bridge balancing, Debye model parameter estimation of independent material with a 1.6% error using full frequency dataset, and 5.3% in high energy efficiency mode, as well as image construction based on material permittivity differences.

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We present a compact, scalable, and broadband architecture for the implementation of complex microwave permittivity sensors in complementary metal-oxide semiconductor (CMOS) technology. The proposed architecture consists of a patch sensor embedded in a programmable balanced readout bridge and performs third and fifth harmonic downconversion for fast multi-frequency readout. Circuits designed can act as the basic building block for a wide span of biomedical applications, ranging from wearables to permittivity imaging. Experimental results of manufactured prototypes demonstrate measurement noise reduction through bridge balancing, Debye model parameter estimation of independent material with a 1.6% error using full frequency dataset, and 5.3% in high energy efficiency mode, as well as image construction based on material permittivity differences.

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We present a compact, scalable, and broadband architecture for the implementation of complex microwave permittivity sensors in complementary metal-oxide semiconductor (CMOS) technology. The proposed architecture consists of a patch sensor embedded in a programmable balanced readout bridge and performs third and fifth harmonic downconversion for fast multi-frequency readout. Circuits designed can act as the basic building block for a wide span of biomedical applications, ranging from wearables to permittivity imaging. Experimental results of manufactured prototypes demonstrate measurement noise reduction through bridge balancing, Debye model parameter estimation of independent material with a 1.6% error using full frequency dataset, and 5.3% in high energy efficiency mode, as well as image construction based on material permittivity differences.

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In this paper, we present a technique to extract the complex permittivity of the different layers (i.e., pulp and skin) of a biological sample (i.e., mangoes) in broadband dielectric spectroscopy measurements. The proposed approach is based on a newly developed accurate and rapid electromagnetic lumped capacitance equivalent network model for the open-ended coaxial cable, capable of accounting for stratified layered media. Combining broadband dielectric measurement with the model predictions allows to derive the permittivity of the internal layers of the biological sample. The proposed approach is applied to evaluate fruit quality, i.e., staging of the effective fruit ripening and identification of internal fruit defects (not visible externally). Broadband permittivity measurements (0.5GHz to 5GHz) are presented and combined with the EM model to demonstrate the effectiveness of the technique for evaluation of the internal (i.e., pulp) staging and structure disorders in Mangoes.

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In this paper, we present a technique to extract the complex permittivity of the different layers (i.e., pulp and skin) of a biological sample (i.e., mangoes) in broadband dielectric spectroscopy measurements. The proposed approach is based on a newly developed accurate and rapid electromagnetic lumped capacitance equivalent network model for the open-ended coaxial cable, capable of accounting for stratified layered media. Combining broadband dielectric measurement with the model predictions allows to derive the permittivity of the internal layers of the biological sample. The proposed approach is applied to evaluate fruit quality, i.e., staging of the effective fruit ripening and identification of internal fruit defects (not visible externally). Broadband permittivity measurements (0.5GHz to 5GHz) are presented and combined with the EM model to demonstrate the effectiveness of the technique for evaluation of the internal (i.e., pulp) staging and structure disorders in Mangoes.

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This paper presents a 0.15×0.3 mm2 complex permittivity sensor integrated in a 40-nm CMOS node. A single-ended patch, employed as a near-field sensing element, is integrated with a double-balanced, fully-differential tunable impedance bridge that is driven by a square RF pulse. The multi-harmonic, interme-diate-frequency down-conversion architecture achieves a compact form factor and fast multi-frequency readout. Measurement results show good agreement with theoretical values and the measured relative permittivity variation remains below 0.3 over a 0.1-10 GHz range at a 1-ms measurement time. The energy efficiency resulting from the fast measurement time and the record-small active area allows integration in battery-operated wearables.@en

This paper presents a 0.15×0.3 mm2 complex permittivity sensor integrated in a 40-nm CMOS node. A single-ended patch, employed as a near-field sensing element, is integrated with a double-balanced, fully-differential tunable impedance bridge that is driven by a square RF pulse. The multi-harmonic, interme-diate-frequency down-conversion architecture achieves a compact form factor and fast multi-frequency readout. Measurement results show good agreement with theoretical values and the measured relative permittivity variation remains below 0.3 over a 0.1-10 GHz range at a 1-ms measurement time. The energy efficiency resulting from the fast measurement time and the record-small active area allows integration in battery-operated wearables.@en

This paper presents a 0.15×0.3 mm2 complex permittivity sensor integrated in a 40-nm CMOS node. A single-ended patch, employed as a near-field sensing element, is integrated with a double-balanced, fully-differential tunable impedance bridge that is driven by a square RF pulse. The multi-harmonic, interme-diate-frequency down-conversion architecture achieves a compact form factor and fast multi-frequency readout. Measurement results show good agreement with theoretical values and the measured relative permittivity variation remains below 0.3 over a 0.1-10 GHz range at a 1-ms measurement time. The energy efficiency resulting from the fast measurement time and the record-small active area allows integration in battery-operated wearables.@en

In this contribution we present a new class of N:1 power combiner based on synthetic waveguides integrated in silicon technologies back-end-of-line. The input feeding is based on (N) E field probes employing capacitive resonance, feeding a waveguide with artificial dielectrics (ADs). The signal summation occurs on a single transverse plane, thus providing insertion losses which do not scale with the number of inputs. This results in a combiner more compact and without restriction in the number of inputs compared to the traditional power of two (2N) combiners. The power combiner operation is presented in a BiCMOS technology implementation and analyzed by means of full wave electromagnetic (EM) simulations. Finally, the experimental results of an integrated 4:1 back-to-back-combiner operating in the 240-310GHz band is presented and compared with the full EM model.@en

In this contribution we present a new class of N:1 power combiner based on synthetic waveguides integrated in silicon technologies back-end-of-line. The input feeding is based on (N) E field probes employing capacitive resonance, feeding a waveguide with artificial dielectrics (ADs). The signal summation occurs on a single transverse plane, thus providing insertion losses which do not scale with the number of inputs. This results in a combiner more compact and without restriction in the number of inputs compared to the traditional power of two (2N) combiners. The power combiner operation is presented in a BiCMOS technology implementation and analyzed by means of full wave electromagnetic (EM) simulations. Finally, the experimental results of an integrated 4:1 back-to-back-combiner operating in the 240-310GHz band is presented and compared with the full EM model.@en

Microwave broadband wide-scan antenna arrays are typically implemented resorting to vertical arrangements of printed circuit boards (PCBs). Here, we propose a planar solution realized with a single multi-layer PCB, with consequent reduction in cost and complexity of the array. It consists of an array of connected slots backed by a metallic reflector and loaded with superstrates. Artificial dielectric layers (ADLs) are used in place of real dielectrics to realize the superstrates, as they are characterized by very low surface-wave losses. For the unit-cell design, we developed an analysis tool based on closed-form expressions and thus requiring minimal computational resources. Finite-array simulations are also performed by generalizing the analysis method to account for the truncation effects. The presence of the ADL superstrate allows reducing the distance between the array plane and the backing reflector while maintaining good matching performance. A realistic feed structure is also proposed, which consists of a microstrip line connected to a coaxial feed. Such a solution does not require balanced-to-unbalanced transitions, which often limit the achievable bandwidth. The proposed structure achieves in simulations more than an octave bandwidth (6.5–14.5 GHz), within a scanning range of ±50 degrees in all azimuth planes.@en

In this paper we present a synthetic waveguide integrated in a commercial BiCMOS back-end-of-line, employing artificial dielectrics (ADs) to reduce the component size. The AD is realized by employing floating pillars using the various layers available in the technology, thus fulfilling metal density rule and boosting the effective permittivity of the host medium (i.e., SiO2) to 12.5. The impact of the AD translates in a 56% width reduction of the waveguide, for the same cutoff frequency. The structure provides 1.6dB of losses per guide wavelength (λg) at 300GHz and more than 30dB suppression below 180GHz, avoiding the need of filters in multiplication stages.@en

In this paper we present a synthetic waveguide integrated in a commercial BiCMOS back-end-of-line, employing artificial dielectrics (ADs) to reduce the component size. The AD is realized by employing floating pillars using the various layers available in the technology, thus fulfilling metal density rule and boosting the effective permittivity of the host medium (i.e., SiO2) to 12.5. The impact of the AD translates in a 56% width reduction of the waveguide, for the same cutoff frequency. The structure provides 1.6dB of losses per guide wavelength (λg) at 300GHz and more than 30dB suppression below 180GHz, avoiding the need of filters in multiplication stages.@en

We present a novel concept for wideband, wide-scan phased array applications. The array is composed by connected-slot elements loaded with artificial dielectric superstrates. The proposed solution consists of a single multi-layer planar printed circuit board (PCB) and does not require the typically employed vertical arrangement of multiple PCBs. This offers advantages in terms of complexity of the assembly and cost of the array. We developed an analytical method for the prediction of the array performance, in terms of active input impedance. This method allows to estimate the relevant parameters of the array with a negligible computational cost. A design example with a bandwidth exceeding one octave (VSWR<2 from 6.5 to 14.3 GHz) and scanning up to 50 degrees for all azimuth planes is presented.@en

This contribution presents the development of an integrated power combiner in Bi-CMOS technology employing artificial dielectric layers (ADLs) at submillimeter wave frequencies. The power is gathered from frequency multiplier chains into a single waveguide which is loaded with ADL in order to reduce the structure footprint.@en